iMX8 Selecting IMX8MM_AUDIO_PLL1_OUT or IMX8MM_AUDIO_PLL2_OUT using sofware

[edwardtyrrell]

Hi All,

Is it possible to swap/change PLLs (IMX8MM_AUDIO_PLL1_OUT, IMX8MM_AUDIO_PLL2_OUT) within a driver via software? Currently our SoC CODEC driver uses a fixed PLL as its main reference for calculating audio rates. I understand the normal way to use the PLL source is to declare it in the device tree using the "assigned-clock-parents" property; but we now need to change the PLL source within the driver on demand.

Any advice appreciated.

Thanks.

[riteshmpatel]

Hi @edwardtyrrell,

Hope you are doing well.
Please accept my apologies for the delay in response.

As per the hierarchy, The driver shall take the reference from device-tree nodes. Here the audio driver is connected to the SAI interface, so if we change the "assigned-clock-parents" property of the 
particular SAI node in the device tree, it will change the PLL source automatically.

Thanks & Regards,
Ritesh M Patel

[edwardtyrrell]

Hi @riteshmpatel ,

Thanks for your reply; yes I understand when you said "if we change the "assigned-clock-parents" property of the particular SAI node in the device tree, it will change the PLL source automatically"; but my question is I need to change the PLL source inside the driver on demand. Fixing the parent clock in the device tree forces the audio rates to be ether all 44K1 based or all 48K based. Our customers who want to listen to 44K1, 88K2 and 48K, 96K rates won't want to recompile their device trees every time they want to change audio rates! We need a build that will do both rates (44K1+ and 48K+). Is the only other way using an external MCLK clock like a PL611?

Cheers.

[riteshmpatel · Accepted solution]

Hi @edwardtyrrell,

I understand your use case, but unfortunately, the frequencies cannot be changed at run time from the software. The NXP does not provide support for the same.
Changes in the device tree are recommended.

Thanks & Regards,
Ritesh M Patel

[edwardtyrrell]

Hi @riteshmpatel,

Just rereading your reply; it's not the frequencies that need changing in the driver it's the source selection i.e PLL1 or PLL2 to clock the SAI. The fixed device tree frequencies are fine, it's we'd like to switch the routing of either PLL1 or PLL2 to the SAI hardware. Possible?

Thanks.

[riteshmpatel]

Hi @edwardtyrrell,

Unfortunately, switching the routing of either PLL1 or PLL2 to SAI hardware is not possible.

The only possible solution is to change the PLL clock in the device tree.

Thanks & Regards,
Ritesh M Patel

[edwardtyrrell]

Thanks! Appreciate the quick response.

[edwardtyrrell]

Hi @riteshmpatel,

Thanks, that's the information I am looking for. So the way to go is an external MCLK that I can toggle the two base frequencies via a GPIO (depending on requested base rate). Well, at least in theory..

Cheers!