Looking at the NXP reference design for the iMX8 Nano with DDR4, there are some 1uF and 0.01uF capacitors used to filter the generated DRAM_VREF signal. Are these capacitor values critical? Specifically, is there any problem with using 4.7uF in those 3 locations? (Because we already have a bunch of 4.7uF's on the board, so I'd like to limit the number of BOM items - particularly that 0.01uF as it's the only one on the board.)
Thanks a lot.
The C389 and C390 can change to 4.7uF from 1uF, please note the value of the two capacitor must be the same, But C110 can not be changed, C110 and C389 are in parallel.
I am confirming it and give you reply as soon as possible.