iMX6UL - Connect unused ADDR lines on DDR3?

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iMX6UL - Connect unused ADDR lines on DDR3?

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ehwsma
Contributor I

Hi,

I'm currently working on the design of a board which uses a i.MX6UL + DDR3 RAM memory.

At the moment we selected a 1Gb DDR3 (x16), but we might change it to 2Gb in the future.

The only difference when switching between capacity is the number of address lines used:

- Only ADDR[0..12] for 1Gb

- ADDR[0..13] for 2Gb

- ADDR[0..14] for 4Gb

...

As unused ADDR lines are recommended to be NC, is it an issue if those lines are connected after all to ensure higher capacity compatibility?

Thanks

Sébastien

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ehwsma
Contributor I

Hi Igor,

I mean, is it ok to mount a 1Gb DDR3 (with only ADDR[0..12] required) when the board was initially designed for a 4Gb DDR3 (with ADDR[0..14] routed between CPU and DDR component) ?

In that case, CPU ADDR[13;14] would be routed to NC pads of DDR3.

Thanks

Best regards,

Sébastien

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igorpadykov
NXP Employee
NXP Employee

Hi Sébastien

 

yes CPU ADDR[13;14] be routed to NC pads of DDR3

will be fine.

 

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi Sébastien

yes i.MX6UL address lines can be left unconnected if not used.

Best regards
igor
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ehwsma
Contributor I

Hi Igor,

Thanks for your reply.

Actually my suggestion was the opposite: Can I left it CONNECTED while not used? So that I'm higher capacity proof.

Thanks

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igorpadykov
NXP Employee
NXP Employee

Hi Sébastien

 

could you clarify "CONNECTED while not used" ?

 

Best regards
igor

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