In my Bsp of iMX512, a work around is executed at the beginning:
/* workaround for UART SDMA support */
LDR r1, =0x73F00000
LDR r2, =0x77777777
STR r2, [r1]
The 0x73F00000 address seems to be inside AIPS but this is not documented by Freescale.
Do you have any information about the purpose of this workaround? Is it the correct address?
Thank you in advance for your help.
Florent
Hello Florent,
This was supposed to be added on the new version of the manual but was never done. If you look at iMX53 RM, chapter AIPSTZ describes those MPROT registers : after reset, only ARM core is allowed to access this set of peripheral, writing 0x77777777 is allowing all masters, including SDMA to do so. If you want to allow SDMA to access the uart, this is indeed required in your specific OS.
Best regards, Philippe.