i.MX8M mini DDR4 bring-up

saidjazouly · ‎10-09-2020

Good day all,

we are trying to bring-up and run the DDR stress tests on a custom designed i.MX8M mini board.

On the evk using PMIC BD718XX we see the PMIC getting detect, whereas our board that uses PCA9450AHN the tool doesn't detect it, however the tool continues and stops just before the DDR tests begin. (log files below)

we used mscale_ddr_tool_v3.10 with script generated from MX8M_Mini_DDR4_RPA_v11.xlsx adapted to our DDR4 memory (Samsung K4A8G165WC-BCTD).

Are there any settings that need to change in the .ds script (using MX8M_Mini_DDR4_RPA_v11.xlsx) to correctly address and test our DDR4 memory?
Any specific voltages that need to be checked on the NXP PMIC outputs to make sure the processors and other peripherals are well supplied
Is the mscale_ddr_tool_v3.10 suited for various types of PMICs and not only the ROHM part used on the evk 8MMINID4-EVK?

Thank you in advance.

For some reason the attachments upload doesn't work so here is the output from the custom board:

Downloading file 'bin\ddr4_train1d_string.bin' ..Done

Downloading file 'bin\ddr4_train2d_string.bin' ..Done

Downloading file 'bin\ddr4_imem_1d.bin' ..Done

Downloading file 'bin\ddr4_dmem_1d.bin' ..Done

Downloading file 'bin\ddr4_imem_2d.bin' ..Done

Downloading file 'bin\ddr4_dmem_2d.bin' ..Done

Downloading IVT header...Done
Downloading file 'bin\m845s_ddr_stress_test.bin' ...Done

Download is complete
Waiting for the target board boot...

===================hardware_init=====================
hardware_init exit

*************************************************************************

*************************************************************************
MX8 DDR Stress Test V3.10
Built on Feb 5 2020 13:04:09
*************************************************************************

and here is the one from the evk:

Downloading file 'bin\ddr4_train1d_string.bin' ..Done

Downloading file 'bin\ddr4_train2d_string.bin' ..Done

Downloading file 'bin\ddr4_imem_1d.bin' ..Done

Downloading file 'bin\ddr4_dmem_1d.bin' ..Done

Downloading file 'bin\ddr4_imem_2d.bin' ..Done

Downloading file 'bin\ddr4_dmem_2d.bin' ..Done

Downloading IVT header...Done
Downloading file 'bin\m845s_ddr_stress_test.bin' ...Done

Download is complete
Waiting for the target board boot...

===================hardware_init=====================

********Found PMIC BD718XX**********
hardware_init exit

*************************************************************************

*************************************************************************
MX8 DDR Stress Test V3.10
Built on Feb 5 2020 13:04:09
*************************************************************************

--Set up the MMU and enable I and D cache--
- This is the Cortex-A53 core
- Check if I cache is enabled
- Enabling I cache since it was disabled
- Push base address of TTB to TTBR0_EL3
- Config TCR_EL3
- Config MAIR_EL3
- Enable MMU
- Data Cache has been enabled
- Check system memory register, only for debug

- VMCR Check:
- ttbr0_el3: 0x93d000
- tcr_el3: 0x2051c
- mair_el3: 0x774400
- sctlr_el3: 0xc01815
- id_aa64mmfr0_el1: 0x1122

- MMU and cache setup complete

*************************************************************************
ARM clock(CA53) rate: 1800MHz
DDR Clock: 0MHz

============================================
DDR configuration
DDR type is DDR4
Data width: 32, bank num: 8
For DDR4, bank num is the total of 2 bank groups and 4 banks per group
Row size: 16, col size: 10
One chip select is used
Number of DDR controllers used on the SoC: 1
Density per chip select: 2048MB
Density per controller is: 2048MB
Total density detected on the board is: 2048MB
============================================

MX8M-mini: Cortex-A53 is found

*************************************************************************

thank you.