i.MX6ULL using both ethernet ports, but ENET1 won't work

cniedermaier · ‎08-09-2018

I'm using a customized board based on the iMX6ULL 14x14 evk board.

My board uses 2x SMSC 8710A phys.

NXP Linux Kernel 4.1.15

ENET1: link up is shown, didn't get a IP address

ENET2: link up is shown, got IP address

Device Tree:

&fec1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet1>;
        phy-mode = "rmii";
        phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
        phy-reset-post-delay = <10>;
        phy-handle = <&ethphy0>;
        status = "okay";
};

&fec2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet2>;
        phy-mode = "rmii";
        phy-reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
        phy-reset-post-delay = <10>;
        phy-handle = <&ethphy1>;
        status = "okay";

        mdio {
                #address-cells = <1>;
                #size-cells = <0>;

                ethphy0: ethernet-phy@0 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
                        clocks = <&clks IMX6UL_CLK_ENET_REF>;
                        clock-names = "rmii-ref";
                        max-speed = <100>;
                        status = "okay";
                };

                ethphy1: ethernet-phy@1 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <1>;
                        clocks = <&clks IMX6UL_CLK_ENET2_REF>;
                        clock-names = "rmii-ref";
                        max-speed = <100>;
                        status = "okay";
                };
        };
};
...
pinctrl_enet1: enet1grp {
        fsl,pins = <
                MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN            0x1b0b0
                MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER            0x1b0b0
                MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00   0x1b0b0
                MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01   0x1b0b0
                MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN              0x1b0b0
                MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
                MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
                MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
                /* SMSC PHY Reset */
                MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0xb0
        >;
};

pinctrl_enet2: enet2grp {
        fsl,pins = <
                MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
                MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
                MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
                MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
                MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
                MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
                MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
                MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
                MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
                MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
                /* SMSC PHY Reset */
                MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0xb0
        >;
};

After plugin both cable kernel shows the following (eth0 == ENET2, eth1 == ENET1):

fec 20b4000.ethernet eth0: Freescale FEC PHY driver [SMSC LAN8710/LAN8720] (mii_bus:phy_addr=20b4000.ethernet:01, irq=-1)
fec 20b4000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
fec 2188000.ethernet eth1: Freescale FEC PHY driver [SMSC LAN8710/LAN8720] (mii_bus:phy_addr=20b4000.ethernet:00, irq=-1)
fec 2188000.ethernet eth1: Link is Up - 100Mbps/Full - flow control rx/tx
IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready

It seems that both phy MDIO communications are OK...

ifconfig (eth0 == ENET2, eth1 == ENET1):

eth0      Link encap:Ethernet HWaddr 54:10:ec:3e:0c:3a
          inet addr:10.64.31.115 Bcast:10.64.31.255 Mask:255.255.255.0
          inet6 addr: fe80::5610:ecff:fe3e:c3a/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
          RX packets:23 errors:0 dropped:0 overruns:0 frame:0
          TX packets:9 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:3176 (3.1 KiB) TX bytes:1222 (1.1 KiB)

eth1      Link encap:Ethernet HWaddr 54:10:ec:3e:13:ae
          inet6 addr: fe80::5610:ecff:fe3e:13ae/64 Scope:Link
          UP BROADCAST MULTICAST MTU:1500 Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)

On ENET1 no packets neither received nor transmitted...

After unplugging ENET1 the kernel shows the following message:

fec 2188000.ethernet eth1: Graceful transmit stop did not complete!
fec 2188000.ethernet eth1: Link is Down

I have no Idea what is going wrong...

Could anybody help me?

cniedermaier · ‎10-11-2018

Hi,

after a long-running research I discovered the problem.

In my case the bootloader u-boot was responsible for this issue.

I accidently called the function "gpr_init()" in "board_init_f()".

This function isn't intended to use for imx6ull and in my case it broke ENET1 and also the CAN interfaces.

==> After I removed "gpr_init()" from u-boot I can simultaneously use both ethernet ports in linux.

元の投稿で解決策を見る

digesh_patel · ‎12-06-2019

After lot of finding it turns out my issue related to : ENET1 frame errors/rx_crc errors

I had mention the solution there and putting it here to help other.

I had faced the same issue and I found the issue in ENET clock pin in my custom board. We are providing the ENET clock from the processor pin and it is 50Mhz. Even though it is 50Mhz, I had seen issue in the register selection. In the imx6ull-14x14evk the value for the register is 10R. Using the same value for my imx6ull based custom board didn't work because of (may be) pcb trace length and width. I was using the same 10R earlier and it gives me crc and frame errors continuously.

So to resolve it i had replace 10R resistance with the 20R resistance. It resolves my issue and i am seeing no crc/frame errors. You need to select the registancy according to your custom board design.

Thanks,

Digesh

digesh_patel · ‎11-26-2019

analogicstechindialimited‌ Are you able to fix the issue? If yes could you please share the solution how you did it?

I am facing the same issue. Only ENET2 "eth0" works fine and getting dynamic IP when running both ethernets together. But ENET1 "eth1" interface doesn't get dhcp assigned ip.

Thanks,

Digesh

cniedermaier · ‎11-27-2019

Hi,

as I've already mentioned above, the reason why ENET1 didn't work was caused by an accidental call to the "gpr_init()" function in u-boot. I have not changed my configuration of the two Ethernet interfaces in Linux.

digesh_patel · ‎11-27-2019

I couldn't find any function name "init_gpr" or similar function which init the gpr in the u-boot. I checked "board_init_f" as well but it doesn't call any gpr related function.

cniedermaier · ‎11-28-2019

Sorry, it was "gpr_init()" on Mainline u-boot v2018.05.

I corrected my answer above.

digesh_patel · ‎11-29-2019

"gpr_init" is not being called in my case. Even I don't have "board_init_f" function in my board.c file at board/freescale/ directory in u-boot.

the board.c file i have prepared by referring the "board/freescale/mx6ullevk/mx6ullevk.c". since mx6ullevk.c doesn't call the "board_init_f" it won't call in my board.c file.

Here is my actual scenario:

I am running connman network manager in my root file system and doing below:

1. Plug the cable on eth0 interface. It gets the ip

2. Unplug the cable on eth0 and plug it in eth1. it won't get ip untill i bring down the eth0 interface.

3. When bringing down eth0 it gets the ip and can reachable to google.com

4. Unplug the cable from eth1 and plug into eth0 again and bring eth0 up

5. eth0 gets the ip assigned. eth0 gets the ip even if i don't do eth0 down/up in step 3/4

So In any case, eth0 gets the ip but eth1 doesn't get the ip untill i bring down the eth0 interface.

cniedermaier · ‎12-02-2019

Are both ethernet channels in different subnets?

digesh_patel · ‎12-03-2019

It is not on same network. I have one netgear wireless router(link here) and connecting both the eth0 and eth1 cables on same network.

But even if both are on same network I could at least get the dhcp assigned ip for both interfaces eth0 and eth1. In imx6ullevk board I'd tried the same and it is able to assign the dhcp allocated ip for both the eth0 and eth1 interfaces.

My use case is to always have a connectivity on the board when any of the cable get faulty. So i still have connectivity from the other cable. However I know that at a time only one interface can be connected with the internet. In imx6ullevk when I have tested the use case is sufficing and i could switch over to another interface unlike in my board.

analogicstechin · ‎10-10-2018

Hi,

We are also facing same problem

I'm using a customized board based on the iMX6ULL 14x14 evk board.

My board uses 2x SMSC 8720A phys.

NXP Linux Kernel 4.1.15

We require two ETHERNET ports simultaneously for our project

Individually enet1 and enet2 are working fine and we are able to get dynamic IP address and ping google.com

But when we are configuring both enet1 and enet2 in DTS file only enet2 is working and enet1 is not working.

whether two ETHERNET ports work simultaneously ?

Any changes in the driver required ?

What can be the problem?

suggest any solution

Thanks

cniedermaier · ‎10-11-2018

Hi,

after a long-running research I discovered the problem.

In my case the bootloader u-boot was responsible for this issue.

I accidently called the function "gpr_init()" in "board_init_f()".

This function isn't intended to use for imx6ull and in my case it broke ENET1 and also the CAN interfaces.

==> After I removed "gpr_init()" from u-boot I can simultaneously use both ethernet ports in linux.

analogicstechin · ‎10-16-2018

we are not having that function in u-boot ,

Does SMSC driver supports two phys?

Both phys are registering in MDIO bus during boot but driver is assigning to the last PHY only

Should we to make changes driver? or any patches are available to support two phys for lan 8720A

cniedermaier · ‎10-16-2018

For my two LAN 8710A it also works in mainline Kernel without patches (see configuration at the very top).

The phys must have different MDIO addresses (my addresses are 0 and 1).

In device tree MDIO bus must be added to ENET2, because it is probed first.

Yuri · ‎08-09-2018

Hello,

Please try to configure (ifconfig) both ethernet channels manually for different subnets.

Have a great day,

Yuri

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button. Thank you!

cniedermaier · ‎08-10-2018

I configured both ethernet channels manually like it is shown below:

eth0      Link encap:Ethernet HWaddr 54:10:ec:3e:0c:3a
          inet addr:10.64.117.100 Bcast:10.64.117.255 Mask:255.255.255.0
          inet6 addr: fe80::5610:ecff:fe3e:c3a/64 Scope:Link
          UP BROADCAST MULTICAST MTU:1500 Metric:1
          RX packets:310 errors:0 dropped:0 overruns:0 frame:0
          TX packets:28 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:41547 (40.5 KiB) TX bytes:2192 (2.1 KiB)

eth1      Link encap:Ethernet HWaddr 54:10:ec:3e:13:ae
          inet addr:10.64.116.100 Bcast:10.64.116.255 Mask:255.255.255.0
          inet6 addr: fe80::5610:ecff:fe3e:13ae/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)

I can ping ENET2 form outside, but pinging ENET1 from outside won't work!

Also I checked the statistics with ethtool -S eth0/eth1 during ping

ENET1:
NIC statistics:
     tx_dropped: 0
     tx_packets: 0
     tx_broadcast: 0
     tx_multicast: 0
     tx_crc_errors: 0
     tx_undersize: 0
     tx_oversize: 0
     tx_fragment: 0
     tx_jabber: 0
     tx_collision: 0
     tx_64byte: 0
     tx_65to127byte: 0
     tx_128to255byte: 0
     tx_256to511byte: 0
     tx_512to1023byte: 0
     tx_1024to2047byte: 0
     tx_GTE2048byte: 0
     tx_octets: 0
     IEEE_tx_drop: 0
     IEEE_tx_frame_ok: 0
     IEEE_tx_1col: 0
     IEEE_tx_mcol: 0
     IEEE_tx_def: 0
     IEEE_tx_lcol: 0
     IEEE_tx_excol: 0
     IEEE_tx_macerr: 0
     IEEE_tx_cserr: 0
     IEEE_tx_sqe: 0
     IEEE_tx_fdxfc: 0
     IEEE_tx_octets_ok: 0
     rx_packets: 187
     rx_broadcast: 61
     rx_multicast: 126
     rx_crc_errors: 0
     rx_undersize: 0
     rx_oversize: 0
     rx_fragment: 0
     rx_jabber: 0
     rx_64byte: 16
     rx_65to127byte: 107
     rx_128to255byte: 25
     rx_256to511byte: 2
     rx_512to1023byte: 37
     rx_1024to2047byte: 0
     rx_GTE2048byte: 0
     rx_octets: 43390
     IEEE_rx_drop: 0
     IEEE_rx_frame_ok: 187
     IEEE_rx_crc: 0
     IEEE_rx_align: 0
     IEEE_rx_macerr: 0
     IEEE_rx_fdxfc: 0
     IEEE_rx_octets_ok: 43390

ENET2
NIC statistics:
     tx_dropped: 0
     tx_packets: 10
     tx_broadcast: 0
     tx_multicast: 0
     tx_crc_errors: 0
     tx_undersize: 0
     tx_oversize: 0
     tx_fragment: 0
     tx_jabber: 0
     tx_collision: 0
     tx_64byte: 2
     tx_65to127byte: 8
     tx_128to255byte: 0
     tx_256to511byte: 0
     tx_512to1023byte: 0
     tx_1024to2047byte: 0
     tx_GTE2048byte: 0
     tx_octets: 752
     IEEE_tx_drop: 0
     IEEE_tx_frame_ok: 10
     IEEE_tx_1col: 0
     IEEE_tx_mcol: 0
     IEEE_tx_def: 0
     IEEE_tx_lcol: 0
     IEEE_tx_excol: 0
     IEEE_tx_macerr: 0
     IEEE_tx_cserr: 0
     IEEE_tx_sqe: 0
     IEEE_tx_fdxfc: 0
     IEEE_tx_octets_ok: 752
     rx_packets: 374
     rx_broadcast: 134
     rx_multicast: 231
     rx_crc_errors: 0
     rx_undersize: 0
     rx_oversize: 0
     rx_fragment: 0
     rx_jabber: 0
     rx_64byte: 22
     rx_65to127byte: 237
     rx_128to255byte: 50
     rx_256to511byte: 9
     rx_512to1023byte: 56
     rx_1024to2047byte: 0
     rx_GTE2048byte: 0
     rx_octets: 78351
     IEEE_rx_drop: 0
     IEEE_rx_frame_ok: 374
     IEEE_rx_crc: 0
     IEEE_rx_align: 0
     IEEE_rx_macerr: 0
     IEEE_rx_fdxfc: 0
     IEEE_rx_octets_ok: 78351

It seems that ENET1 received the ping, but didn't send an reply.

So it seems that TX doesn't work.

What can I do to find the problem?

Yuri · ‎08-14-2018

Hello,

Can ENET1 and ENET2 work separately as single units?

Regards,

Yuri.

cniedermaier · ‎08-17-2018

Still the same Problem when configure ENET1 and ENET2 separately:

ENET1 doesn't work

ENET2 is working

Config when ENET1 is used:

&fec1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet1>;
        phy-mode = "rmii";
        phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
        phy-reset-post-delay = <10>;
        phy-handle = <&ethphy0>;
        status = "okay";

        mdio {
                #address-cells = <1>;
                #size-cells = <0>;

                ethphy0: ethernet-phy@0 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
                        clocks = <&clks IMX6UL_CLK_ENET_REF>;
                        clock-names = "rmii-ref";
                        max-speed = <100>;
                        status = "okay";
                };
        };
};

pinctrl_enet1: enet1grp {
        fsl,pins = <
                MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
                MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
                MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
                MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
                MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
                MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
                MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
                MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
                MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
                MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
                /* SMSC PHY Reset */
                MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0xb0
        >;
};

Config when ENET2 is used:

&fec2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet2>;
        phy-mode = "rmii";
        phy-reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
        phy-reset-post-delay = <10>;
        phy-handle = <&ethphy1>;
        status = "okay";

        mdio {
                #address-cells = <1>;
                #size-cells = <0>;

                ethphy1: ethernet-phy@1 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <1>;
                        clocks = <&clks IMX6UL_CLK_ENET2_REF>;
                        clock-names = "rmii-ref";
                        max-speed = <100>;
                        status = "okay";
                };
        };
};

pinctrl_enet2: enet2grp {
        fsl,pins = <
                MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
                MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
                MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
                MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
                MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
                MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
                MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
                MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
                MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
                MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
                /* SMSC PHY Reset */
                MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0xb0
        >;
};

I also started linux with both ethernet ports activated and did a register dump (Cables were not plugged in, yet):

[0x02188004]=0x10008000       [0x020B4004]=0x00000000
[0x02188008]=0x00800000       [0x020B4008]=0x00800000
[0x02188010]=0x01000000       [0x020B4010]=0x01000000
[0x02188014]=0x00000000       [0x020B4014]=0x00000000
[0x02188024]=0xF0000112       [0x020B4024]=0xF0000112
[0x02188040]=0x00000000       [0x020B4040]=0x50C62000
[0x02188044]=0x00000000       [0x020B4044]=0x0000001A
[0x02188064]=0x40000000       [0x020B4064]=0x40000000
[0x02188084]=0xC5F20106       [0x020B4084]=0x45F20106
[0x021880C4]=0x00000000       [0x020B40C4]=0x00000000
[0x021880E4]=0x5410EC3E       [0x020B40E4]=0x5410EC3E
[0x021880E8]=0x45B08808       [0x020B40E8]=0x5B4C8808
[0x021880EC]=0x00010000       [0x020B40EC]=0x00010000
[0x021880F0]=0x00000000       [0x020B40F0]=0x00000000
[0x02188100]=0x00000000       [0x020B4100]=0x00000000
[0x02188118]=0x00000000       [0x020B4118]=0x00000000
[0x0218811C]=0x00000000       [0x020B411C]=0x00000000
[0x02188124]=0x00800000       [0x020B4124]=0x00800000
[0x02188144]=0x00000100       [0x020B4144]=0x00000100
[0x02188180]=0x8C408000       [0x020B4180]=0x8C3F0000
[0x02188184]=0x8C40C000       [0x020B4184]=0x8C3F4000
[0x02188188]=0x00000600       [0x020B4188]=0x00000600
[0x02188190]=0x00000000       [0x020B4190]=0x00000000
[0x02188194]=0x00000000       [0x020B4194]=0x00000000
[0x02188198]=0x00000004       [0x020B4198]=0x00000004
[0x0218819C]=0x00000004       [0x020B419C]=0x00000004
[0x021881A0]=0x00000000       [0x020B41A0]=0x00000000
[0x021881A4]=0x00000004       [0x020B41A4]=0x00000004
[0x021881A8]=0x00000008       [0x020B41A8]=0x00000008
[0x021881AC]=0x0000000C       [0x020B41AC]=0x0000000C
[0x021881B0]=0x000005F2       [0x020B41B0]=0x000005F2
[0x021881C0]=0x00000000       [0x020B41C0]=0x00000000
[0x021881C4]=0x00000000       [0x020B41C4]=0x00000000
[0x02188200]=0x00000000       [0x020B4200]=0x00000000
[0x02188204]=0x00000000       [0x020B4204]=0x00000000
[0x02188208]=0x00000000       [0x020B4208]=0x00000000
[0x0218820C]=0x00000000       [0x020B420C]=0x00000000
[0x02188210]=0x00000000       [0x020B4210]=0x00000000
[0x02188214]=0x00000000       [0x020B4214]=0x00000000
[0x02188218]=0x00000000       [0x020B4218]=0x00000000
[0x0218821C]=0x00000000       [0x020B421C]=0x00000000
[0x02188220]=0x00000000       [0x020B4220]=0x00000000
[0x02188224]=0x00000000       [0x020B4224]=0x00000000
[0x02188228]=0x00000000       [0x020B4228]=0x00000000
[0x0218822C]=0x00000000       [0x020B422C]=0x00000000
[0x02188230]=0x00000000       [0x020B4230]=0x00000000
[0x02188234]=0x00000000       [0x020B4234]=0x00000000
[0x02188238]=0x00000000       [0x020B4238]=0x00000000
[0x0218823C]=0x00000000       [0x020B423C]=0x00000000
[0x02188240]=0x00000000       [0x020B4240]=0x00000000
[0x02188244]=0x00000000       [0x020B4244]=0x00000000
[0x02188248]=0x00000000       [0x020B4248]=0x00000000
[0x0218824C]=0x00000000       [0x020B424C]=0x00000000
[0x02188250]=0x00000000       [0x020B4250]=0x00000000
[0x02188254]=0x00000000       [0x020B4254]=0x00000000
[0x02188258]=0x00000000       [0x020B4258]=0x00000000
[0x0218825C]=0x00000000       [0x020B425C]=0x00000000
[0x02188260]=0x00000000       [0x020B4260]=0x00000000
[0x02188264]=0x00000000       [0x020B4264]=0x00000000
[0x02188268]=0x00000000       [0x020B4268]=0x00000000
[0x0218826C]=0x00000000       [0x020B426C]=0x00000000
[0x02188270]=0x00000000       [0x020B4270]=0x00000000
[0x02188274]=0x00000000       [0x020B4274]=0x00000000
[0x02188288]=0x00000000       [0x020B4288]=0x00000000
[0x0218828C]=0x00000000       [0x020B428C]=0x00000000
[0x02188290]=0x00000000       [0x020B4290]=0x00000000
[0x02188294]=0x00000000       [0x020B4294]=0x00000000
[0x02188298]=0x00000000       [0x020B4298]=0x00000000
[0x0218829C]=0x00000000       [0x020B429C]=0x00000000
[0x021882A0]=0x00000000       [0x020B42A0]=0x00000000
[0x021882A4]=0x00000000       [0x020B42A4]=0x00000000
[0x021882A8]=0x00000000       [0x020B42A8]=0x00000000
[0x021882AC]=0x00000000       [0x020B42AC]=0x00000000
[0x021882B0]=0x00000000       [0x020B42B0]=0x00000000
[0x021882B4]=0x00000000       [0x020B42B4]=0x00000000
[0x021882B8]=0x00000000       [0x020B42B8]=0x00000000
[0x021882BC]=0x00000000       [0x020B42BC]=0x00000000
[0x021882C0]=0x00000000       [0x020B42C0]=0x00000000
[0x021882C4]=0x00000000       [0x020B42C4]=0x00000000
[0x021882C8]=0x00000000       [0x020B42C8]=0x00000000
[0x021882CC]=0x00000000       [0x020B42CC]=0x00000000
[0x021882D0]=0x00000000       [0x020B42D0]=0x00000000
[0x021882D4]=0x00000000       [0x020B42D4]=0x00000000
[0x021882D8]=0x00000000       [0x020B42D8]=0x00000000
[0x021882DC]=0x00000000       [0x020B42DC]=0x00000000
[0x021882E0]=0x00000000       [0x020B42E0]=0x00000000
[0x02188400]=0x00000031       [0x020B4400]=0x00000031
[0x02188404]=0x18BFB9D0       [0x020B4404]=0x2EA6E260
[0x02188408]=0x00000000       [0x020B4408]=0x00000000
[0x0218840C]=0x80000000       [0x020B440C]=0x80000000
[0x02188410]=0x00000000       [0x020B4410]=0x00000000
[0x02188414]=0x00000028       [0x020B4414]=0x00000028
[0x02188418]=0x00000000       [0x020B4418]=0x00000000
[0x02188604]=0x00000000       [0x020B4604]=0x00000000
[0x02188608]=0x00000000       [0x020B4608]=0x00000000
[0x0218860C]=0x00000000       [0x020B460C]=0x00000000
[0x02188610]=0x00000000       [0x020B4610]=0x00000000
[0x02188614]=0x00000000       [0x020B4614]=0x00000000
[0x02188618]=0x00000000       [0x020B4618]=0x00000000
[0x0218861C]=0x00000000       [0x020B461C]=0x00000000
[0x02188620]=0x00000000       [0x020B4620]=0x00000000
[0x02188624]=0x00000000       [0x020B4624]=0x00000000

Based on that can anyone see what is wrong with ENET1?