i.MX6 SPI clocking

[davidmüller]

Hello

As far as i can see, the i.MX6 ECSPI controller starts clocking after the CS goes low and stops before CS goes high. Unfortunately this seems to confuse some SPI devices. Is there a (undocumented) way to configure the ECSPI controller to start clocking before the CS goes low or to provide a continuous clock?

[terrykelleher]

This is the way SPI is supposed to operate. SCLK is ignored by a SPI Slave unless the SS# is asserted. Starting the clock early would have no good impact, and might cause issues if the first falling edge occurs coincidentally with the falling SS#.

I cannot imagine you would be able to take over the SCLK with GPIO, as the SPI Master needs to insure that data is ready prior to the falling clock edge. An independent clock would be out of sync.

Terry

[igorpadykov]

Hi David

you can use GPIO as CS,

there are no other undocumented settings, all are given in RM.

Best regards

chip

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[davidmüller]

Thanks for your fast answer but I think I would rather need to set up the CLK line as GPIO to achieve a running clock before CS goes low. Unfortunately this contradicts the concept of having a dedicated SPI controller hardware.:smileysad: