i.MX6 PCIe read hang

[jbd64]

Hi,

We designed a custom board based on imx6Dual, where it connects Intel i210 ethernet controller through PCIexpress.

We are using linux kernel 4.1.15_1.0.0 retrieved from Yocto BSP.

Intel IGB driver correctly identifies i210 component through PCIexpress, but linux hangs randomly (and quickly : ~ 1 to 10secs after the beginning of i210 initialization).

I added printk in every beginning and ending of pcie-imx6.c functions and igb functions, and it appears that it hangs at a read on a register : "value = readl(&hw_addr[reg]);" in "igb_rd32(struct e1000_hw *hw, u32 reg)" in "igb_main.c".

We searched for similar issue on imx6 pcie and it seems that imx6 pcie has some dysfunctions.

I found that PCIe PHY Tx values can be adjusted by IOMUXC_GPR8 register, depending on the hardware, but there is no clue for this. Are these values criticals and can they produce read hang ?

Is there any documentation on PHY Tx adjustements and explanations ?

In advance thank you for your support.

Any suggestions will be appreciated !

JBD.

[igorpadykov]

Hi JBD

for IOMUXC_GPR8  usage please check AN4784 PCIe Certification Guide for i.MX 6Dual/6Quad and i.MX 6Solo/6DualLite
http://www.nxp.com/assets/documents/data/en/application-notes/AN4784.pdf 

Best regards
igor
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[jbd64]

Hi Igor,

Thank you for your response, I appreciate it !

I already read AN4784 document, but it did not help us a lot since we don't have the mandatory measure equipment to process the test.

We can not find any explanation on how to configure IOMUXC_GPR8 fields without following AN4784 procedure, which is very cost effective when you don't already own the measure equipment.

Can you explain us how each field of IOMUXC_GPR8 modifies PHY Tx timings/levels; i.e. :

- What is the launch amplitude of the transmitter and how TX_SWING_LOW modifies it ?

- What is the Tx driver SWING_FULL value ?

- What is the Tx driver de-emphasis value ?

If you are not able to reply to it, can you at least redirect me to a document in order to dig into it ? (subsection of pcie specification or else...).

Thank you for your support.

JBD.

[igorpadykov]

Hi JBD

for explanation of these parameters one can refer to PCIe specifications

Specifications | PCI-SIG 

Best regards
igor

[jbd64]

Hi,

Thank you for your link, but our organization is not member of PCI-SIG.