i.MX6 EIM driver for CPLD

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i.MX6 EIM driver for CPLD

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Jason321
Contributor I

Hi,I'm currently working on a Linux driver for communicating with a CPLD via the EIM port.Non Multiplexed Addres/Data mode 16-bit.  I think I have a question on the EIM configuration, I've been digging through the chip reference manual, but it's not giving me a lot of insight into how I set this up.
Does anyone have any test code or code snippets they would be willing to share?  Maybe an example they found somewhere that helped?  I've looked through the Linux BSP code, and didn't find anything, but might have missed it.  I would have thought there would be some chipset test code somewhere with the BSP, but it's possible that I missed it.  Thanks.

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi,

   Linux bsp supports weim driver,  for examples on hardware and software, customer can refer to imx6qdl-sabreAI board.

   on the board, Parallel nor flash are connected to weim interface, so for the driver of the interface for CPLD or FPGA, customer can refer to that of parallel nor flash.

-imx6qdl.dtis (weim driver)

weim: weim@21b8000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,imx6q-weim";
reg = <0x021b8000 0x4000>;
interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_EIM_SLOW>;
fsl,weim-cs-gpr = <&gpr>;
status = "disabled";
};

--imx6qdl-sabreauto.dtsi

&weim {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
ranges = <0 0 0x08000000 0x08000000>;
status = "disabled"; /* pin conflict with SPI NOR */

nor@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x02000000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
0x0000c000 0x1404a38e 0x00000000>;
};
};

 

Have a nice day!

B.R,

weidong

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Jason321
Contributor I

Thanks,and how to configure the registers in the fsl,weim-cs-timing propertie?

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