i.MX6 BT656 to ADV7391

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i.MX6 BT656 to ADV7391

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jfp
Contributor II

Hello everybody,

I'm trying to output  BT656 video to an ADV7391, using the patch given by Patch to Support BT656 and BT1120 Output For i.MX6 BSP 

It seems to work correctly, but when i have right part of the displayed image that have saturated blank pixels, the ADV lost it's synchronisation, like if it interprets some blank pixels as EAV or SAV codes.

I checked that the DP_CSC_YUV_SAT_MODE_SYNC field of the IPUx_DP_COM_CONF_SYNC register is set, and it is set but seems to not have any effect : values 0xFF can be viewed on the data bus coming onto the ADV bus.

So I tryed to use hardware synchronisation HSYNC/VSINC, but I'am using a VAR-DART-MX6 bord which only outputs counter DIO_3 as VSYNC (the pin that every display driver seems to use), and the BT656 IPU driver uses counter DIO4. I have no access to this pin !

Is there someone who would have an idea why the EAV / SAV synchronisation is lost by the ADV ?

Or is there someone who would havec an idea on how to change the output VSYNC pin from DIO_4 to DIO_3 ?

Thanks for all

Jean-François

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igorpadykov
NXP Employee
NXP Employee

Hi Jean-François

for changing output VSYNC to another pin one can look at

i.MX53: How to move VGA external HSYNC and VSYNC signals to different pins? 

Best regards
igor
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jfp
Contributor II

Hi Igor,

thanks for your response.

But in fact I don't think what I want is possible.

The BT656 on iMX6 uses following counters :

    DI_BT656_SYNC_BASECLK = 1,
    DI_BT656_SYNC_HSYNC = 2,
    DI_BT656_SYNC_IVSYNC = 3,
    DI_BT656_SYNC_VSYNC = 4,
    DI_BT656_SYNC_AFIELD = 5,
    DI_BT656_SYNC_NVSYNC = 9,

counter 2 is for HSYNC, and I can use it.

counter 3 is used for Internal VSYNC only

counter 4 is used for real VSYNC but outputs signal on pin DIO_4, and is based on DI_BT656_SYNC_IVSYNC.

So if I set VSYNC as counter 3 to output on pin 3, this counter cannot works because it cannot be based on counter 4...

Perhaps there is another way to use the differents counter, but I don't find it, I don't know the IPU microcode and how it works.

If the ADV was running correctly with EAV/SAV synchronisation it would be OK.

Nobody as an idea about why DP_CSC_YUV_SAT_MODE_SYNC field of the IPUx_DP_COM_CONF_SYNC seems to have no effect ?

Regards,

Jean-François

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igorpadykov
NXP Employee
NXP Employee

Hi Jean-François

for changing microcodes one can apply to  NXP Professional Services, as due to

complexity it is not supported in usual way

http://www.nxp.com/support/nxp-professional-services:PROFESSIONAL-SERVICE

Best regards
igor

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jfp
Contributor II

Hi Igor,

thanks for the answer.

We will see what to do.

Best regards,

Jean-François

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