i.MX25 USB controller behavior.

[satoshishimoda]

Hi community,

I'm using i.MX25 USBOH as full speed "device".

Please see the attached file, it is a timing diagram of our USB function.

USB controller execute a specific "data receive function" when detect receive interrupt, and wait next receive interrupt after that.

Then, the cycle from "USB receive interrupt" to "waiting data receive" is about 20 usec.

In other words, USB controller ready in 20 usec to receive the next interrupt after receiveing a interrup.

However, receiving interrupt is NOT generated in less than 1 msec cycle because USB controller send NAK to out token from USB host.

Then, please see my questions below.

[Q1]

Why USB controller send NACK even though software ready for receiving a interrupt?

Could you let me know the condition for USB controller send NAK?

[Q2]

Could you let me know the condition to generate a receive interrupt by USB controller?

[Q3]

USB controller judge the end of data receiving?

Especially, I want to know in the case that receive data is multiple of MaxPacketSize.

Best Regards,

Satoshi Shimoda

[YixingKong]

Satoshi

Have your questions been resolved? If not, what is your further request? Please keep communicating with engineer promptly.

Regards,

Yixing

[YixingKong · Accepted solution]

Satoshi

Here is the response from our engineer. Please feel free to come here again with your reply.

Thanks,

Yixing

-----------------------------------------------

The USBOH is a high-speed EHCI controller. It's operation is controlled by transfer descriptors in memory (unlike many older full-speed controllers), even when operating in full-speed. So, you may not see an interrupt for every packet that is received/transmitted.

Why USB controller send NACK even though software ready for receiving a interrupt?

Could you let me know the condition for USB controller send NAK?

The USB controller will send NAK when the endpoint is not primed.

The software prepares one or more transfer descriptors, add them to device queud head and the sets the prime bit for the controller to load the descriptor. Once that is completed the controller will respond with data to IN tokens,

[Q2]
Could you let me know the condition to generate a receive interrupt by USB controller?

There is no "receive interrupt” in the USB controller. The controller has a UI interrupt which signals the end of a transfer. You can control if interrupts generated on end of transaction if you set the IOC bit in the transfer descriptor.

[Q3]
USB controller judge the end of data receiving?

Especially, I want to know in the case that receive data is multiple of MaxPacketSize.

That is all explained in the USB specification. Most of it also in the reference manual.

When the data (total-bytes field in dTD) exceeds wMaxPacketSize, then multiple packets will be sent. If the last packet does not have MaxPacketSize bytes, then this is a short packet and the controller will detect this as the end.

If the last packet has MaxPacletSize bytes then the controller will see that the byte counter (TotalBytes) has reached 0 and it will not expect a new packet.

So, the device controller must know how many bytes it must transfer. The host normally provides that before requesting/sending data. The exact mechanism depends on the protocol that is being used.

[satoshishimoda]

Dear Yixing Kong,

Thank you for your reply.

OK, I understood.

Thank you for your cooperation.

Best Regards,

Satoshi Shimoda