About LCD_RESET pin of LCD IF of iMX28

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About LCD_RESET pin of LCD IF of iMX28

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yuuki
Contributor V

LCD IF of i.MX28 has LCD_RESET pin.

According to RESET(Bit0) of HW_LCDIF_CTRL1, LCD_RESET output signal is able to controled by changing this field.

I think that LCD_RESET pin is controllable by GPIO.

Does the control by RESET bit field have a special function (compared with GPIO control)?
Is RESET set by conditions automatically?

Best Regards,

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Yuri
NXP TechSupport
NXP TechSupport

  You are right, according to section 9.2.2 (Pin Interface Multiplexing)  of the i.MX28
Reference Manual : “Because the pin mux configuration is independent for each individual

pin, many pins which are not required for a given active interface can be reused as GPIO

  1. pins. For example, the LCD_RESET pin can be configured and controlled as a GPIO pin, while

the other LCD interface pins are still controlled by the LCDIF”.
Also note LCD_RESET pin function may be selected via HW_PINCTRL_MUXSEL7 [BANK3_PIN30]

as LCD_RESET, or as LCD_VSYNC, or as GPIO. Please take a look at section 9.4.9 “PINCTRL Pin
Mux Select Register 7 (HW_PINCTRL_MUXSEL7)”. LCD_RESET signal polarity, when using under LCDIF,

is controlled via HW_LCDIF_CTRL1 [RESET] bit. [Section 33.4.2 “LCDIF General Control1 Register

(HW_LCDIF_CTRL1)”.] Note : no automatic control.

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Yuri
NXP TechSupport
NXP TechSupport

  You are right, according to section 9.2.2 (Pin Interface Multiplexing)  of the i.MX28
Reference Manual : “Because the pin mux configuration is independent for each individual

pin, many pins which are not required for a given active interface can be reused as GPIO

  1. pins. For example, the LCD_RESET pin can be configured and controlled as a GPIO pin, while

the other LCD interface pins are still controlled by the LCDIF”.
Also note LCD_RESET pin function may be selected via HW_PINCTRL_MUXSEL7 [BANK3_PIN30]

as LCD_RESET, or as LCD_VSYNC, or as GPIO. Please take a look at section 9.4.9 “PINCTRL Pin
Mux Select Register 7 (HW_PINCTRL_MUXSEL7)”. LCD_RESET signal polarity, when using under LCDIF,

is controlled via HW_LCDIF_CTRL1 [RESET] bit. [Section 33.4.2 “LCDIF General Control1 Register

(HW_LCDIF_CTRL1)”.] Note : no automatic control.

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