i.MX 7Dual_VSNVS sequence

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i.MX 7Dual_VSNVS sequence

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tonywk
Contributor I

Hi team,

The power up sequence of i.mx7 is correct with PF3000.

However, when we remove the Vin of PF3000, VSNVS would turn off faster than other power rails.

Is that a problem for i.mx7?

 

Thanks.

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tonywk
Contributor I

Hi team,

Here is the measure result of i.mx7 power down sequence.

Could you advise me for following result?

Any risk it could be while the power down sequence can't be meet?

1.VDD_ARM_IN&SW2_1V8&VLDO1_1V8 get to GND to VSNVS ramp down ,the result is -23.91s. ( Power off)

tonywk_0-1719897605079.jpeg

2.NVCC_DRAM&DDR_VREF power down to VDD_SOC_IN power down, the result is -1.68s. ( Power off)

tonywk_1-1719897638861.jpeg

 


3.VLDO3_3V3&NVCC_3V3&NVCC_SD1 get to GND to VSNVS ramp down, the result is -2.40s. ( Power off)

tonywk_2-1719897664778.jpeg

 


4.VCC_5V&VDD_SOC_IN get to GND to VSNVS ramp down, the result is -8.49s. ( Power off)

tonywk_3-1719897684349.jpeg

And another question about the power down requirement of PF3000.

VDDIO would be higher than VIN within 1.31s when power off the system.

Is this requirement to be followed even in power down?

tonywk_0-1719898190692.png

tonywk_1-1719898381285.jpeg

 

Thanks.

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jimmychan
NXP TechSupport
NXP TechSupport

It is better to follow the Power down sequence.

Please read the datasheet.

https://www.nxp.com.cn/docs/en/data-sheet/IMX7DCEC.pdf

4.1.10 Power-down sequence

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tonywk
Contributor I

Hi @jimmychan ,

If the Power down sequence can not be follow, any risk would have while the power up sequence is always correct?

Thanks.

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