Hi,
Can anyone please help me to understand the power-down sequence of i.MX 6ULL in the MCIMX6ULL-CM reference board.
As you know, a power-down sequence is mentioned in the datasheet, but I am not sure how it's happening in the reference board.
Please help me.
Hello,
Are you interested in something in specific of the power down sequence?
NXP design are tested so it complies with the power up/down sequence.
Best regards,
Aldo.