emmc speed too low in mx6ull

[changbaoma]

my imx6ull connects emmc(MICRON 4GB  MTFC4GACAJCN-4MIT
) to usdhc2.

with 8-bit data bus mode :

&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2_8bit>;
pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
bus-width = <8>;

no-1-8-v;

non-removable;
status = "okay";
};

Write Test CMD: time dd if=/dev/zero of=./500MB bs=1M count=500

Read Test CMD: time dd of=/dev/null if=./500MB bs=1M count=500

Speed: read=20MB/s write=15MB/s    (work at MMC_TIMING_MMC_DDR52 )

root@Router:~# cat /sys/kernel/debug/mmc1/ios
clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)

if with 4-bit data bus mode :

&usdhc2 {

pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
bus-width = <4>;

non-removable;
status = "okay";
};

Speed: read=29MB/s write=15MB/s    (work at MMC_TIMING_MMC_DDR52)

I do a test in a 3rd part demo board 100ask_imx6ll (MYIR tech), its speed is only read=30MB/s write=13MB/s.

Also if i replace my imx6ull emmc with SkyHigh's S40FC004C1B1I000 (4GB), the test speed is read=50MB/s write=11MB/s.(also only work at MMC_TIMING_MMC_DDR52 )

What is NXP's EVK board emmc speed test reslut?  anyone test for me?

Anyone know why 8-bit mode speed is lower then 4-bit mode?

How to reach a higher MMC HS200 mode ? (RM say imx6ull support HS200 mode)

[Rita_Wang · Accepted solution]

Yes, For the imx6ull support HS200 mode, for the 8bit support, you need to make  imx6ull's emmc controler and emmc flash powered 1.8V, and in the code remove "no-1-8-v;".

For your setting I see you are using the 3.3V, so only 4bit works.

[changbaoma]

Thank you for your professional response，@Rita_Wang 

[Rita_Wang]

You are welcome, wish you have a nice day.

[Rita_Wang]

Which version BSP are you using? I will confirm it for you.

[changbaoma]

the emmc part of our schemetic as below:

 

our imx6ull's emmc controler and emmc flash are powered 3.3v only, so i add "no-1-8-v;" into usdhc2 node of dts.

Is that right?

&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2_8bit>;
pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
bus-width = <8>;

no-1-8-v;

non-removable;
status = "okay";
};

if remove "no-1-8-v;" from usdhc2 node of dtsm,  our imx6ull probe emmc flash fail.

and i find in  linux-imx-5.4.24/drivers/mmc/host/sdhci-esdhc-imx.c

static int
sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
struct sdhci_host *host,
struct pltfm_imx_data *imx_data)
{

...

if (of_find_property(np, "no-1-8-v", NULL))
      host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;

...

}

and i find in linux-imx-5.4.24/drivers/mmc/host/sdhci.c

if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) {
host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);
/*
* The SDHCI controller in a SoC might support HS200/HS400
* (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property),
* but if the board is modeled such that the IO lines are not
* connected to 1.8v then HS200/HS400 cannot be supported.
* Disable HS200/HS400 if the board does not have 1.8v connected
* to the IO lines. (Applicable for other modes in 1.8v)
*/
mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HS400_ES);
mmc->caps &= ~(MMC_CAP_1_8V_DDR | MMC_CAP_UHS);
}

those two infos make we confuse?

how to let our imx6's emmc reach a higher speed?

[changbaoma]

we use the kernel pulled from NXP's https://source.codeaurora.org/external/imx/linux-imx branch imx_5.4.24_2.1.0 recently.