i'm having two issues booting linux-imx_4.1.15_1.0.0_ga on imx6sx:
anatop is configuring the following :
anatop_regulator 20c8000.anatop:regulator-vddcore@140: Failed to read a valid default voltage selector.
anatop_regulator: probe of 20c8000.anatop:regulator-vddcore@140 failed with error -22
anatop_regulator 20c8000.anatop:regulator-vddsoc@140: Failed to read a valid default voltage selector.
anatop_regulator: probe of 20c8000.anatop:regulator-vddsoc@140 failed with error -22
all the above is defined in the imx6sx.dtsi:
reg_arm: regulator-vddcore@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "vddarm";
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1450000>;
regulator-always-on;
anatop-reg-offset = <0x140>;
anatop-vol-bit-shift = <0>;
anatop-vol-bit-width = <5>;
anatop-delay-reg-offset = <0x170>;
anatop-delay-bit-shift = <24>;
anatop-delay-bit-width = <2>;
anatop-min-bit-val = <1>;
anatop-min-voltage = <725000>;
anatop-max-voltage = <1450000>;
}
and a crash:
Key type dns_resolver registered
cpu cpu0: dev_pm_opp_get_opp_count: device OPP not found (-19)
failed to register cpuidle driver
Unable to handle kernel NULL pointer dereference at virtual address 00000008
pgd = 80004000
[00000008] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.1.15 #1
Hardware name: Freescale i.MX6 SoloX (Device Tree)
task: 8804c000 ti: 88050000 task.ti: 88050000
PC is at imx_amp_power_init+0x98/0xe8
LR is at 0x0
pc : [<80aa1a34>] lr : [<00000000>] psr: a0000113
sp : 88051ee8 ip : 00000001 fp : 8bfff900
r10: 80adeb7c r9 : 00000008 r8 : 80b606b0
r7 : 00000014 r6 : 00000001 r5 : 80b6025c r4 : 00000001
r3 : 00000000 r2 : 88002b00 r1 : 00000000 r0 : 88002b00
Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 8000404a DAC: 00000015
Process swapper/0 (pid: 1, stack limit = 0x88050210)
Stack: (0x88051ee8 to 0x88052000)
1ee0: 80af7720 80af7720 88675f80 80aa199c 00000000 80009730
1f00: 807c8bf4 80a51c18 0000010d 00000087 00000000 80a52478 00000072 88051f30
1f20: 8bfff9ca 8bfff9bc 807c8bf4 8004c5b8 00000000 00000000 8096aacc 00000007
1f40: 00000007 809763c4 80aff3d0 0000010d 0000010d 80b5f000 80b5f000 80aeb664
1f60: 80adeb78 80adeb7c 8bfff900 80a87db4 00000007 00000007 80a875a0 8079b8a4
1f80: 8bb2c800 0000f000 8079198c 00000000 00000000 00000000 00000000 00000000
1fa0: 00000000 80791998 00000000 8000f528 00000000 00000000 00000000 00000000
1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 fdffdab9 ef3053af
[<80aa1a34>] (imx_amp_power_init) from [<80009730>] (do_one_initcall+0x8c/0x1d8)
[<80009730>] (do_one_initcall) from [<80a87db4>] (kernel_init_freeable+0x140/0x1d0)
[<80a87db4>] (kernel_init_freeable) from [<80791998>] (kernel_init+0xc/0xe0)
[<80791998>] (kernel_init) from [<8000f528>] (ret_from_fork+0x14/0x2c)
Code: e0233497 e7952102 e2844001 e1a00002 (e5832008)
---[ end trace 5d15f49654e5e9b0 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
according to this email the error is benign is it?
[PATCH V2] ARM: imx: add cpufreq support for i.mx6sx
Is there output kernel boot up for 4.1.15?
Still trying to resolve the issue Waiting for root device /dev/mmcblk0p2...
seems this board is not intergared in L4.1.15 yet,
suggest to apply to Udoo Neo vendor for adapting it.
Added some additional code to check shared memory was initialized
static int __init imx_amp_power_init(void)
{
int i;
void __iomem *shared_mem_base;
if (!(imx_src_is_m4_enabled() && cpu_is_imx6sx()))
return 0;
amp_power_mutex = imx_sema4_mutex_create(0, MCC_POWER_SHMEM_NUMBER);
shared_mem_base = ioremap_nocache(shared_mem_paddr, shared_mem_size);
if (!shared_mem_base) {
pr_err("Failed ioremap_nocache shared_mem_paddr!\n");
return 0;
}
shared_mem_base is setup if the m4 is in the dt; in this case it is not so, shared_mem_base is NULL.
Now; the issue is still:
anatop_regulator 20c8000.anatop:regulator-vddcore@140: Failed to read a valid default voltage selector.
anatop_regulator: probe of 20c8000.anatop:regulator-vddcore@140 failed with error -22
anatop_regulator 20c8000.anatop:regulator-vddsoc@140: Failed to read a valid default voltage selector.
anatop_regulator: probe of 20c8000.anatop:regulator-vddsoc@140 failed with error -22
Also, there are a few other issues:
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
/soc/aips-bus@02100000/usdhc@02194000: voltage-ranges unspecified
sdhci-esdhc-imx 2194000.usdhc: Got CD GPIO
sdhci-esdhc-imx 2194000.usdhc: No vmmc regulator found
sdhci-esdhc-imx 2194000.usdhc: No vqmmc regulator found
mmc0: SDHCI controller on 2194000.usdhc [2194000.usdhc] using ADMA
/soc/aips-bus@02100000/usdhc@02198000: voltage-ranges unspecified
sdhci-esdhc-imx 2198000.usdhc: could not get ultra high speed state, work on normal mode
sdhci-esdhc-imx 2198000.usdhc: No vqmmc regulator found <-- issue causes sdcard ?
usb 2-1: new full-speed USB device number 2 using ci_hdrc
mmc2: SDHCI controller on 2198000.usdhc [2198000.usdhc] using ADMA
galcore: clk_get 2d core clock failed, disable 2d/vg!
cpu cpu0: dev_pm_opp_get_opp_count: device OPP not found (-19)
failed to register cpuidle driver <--- isuue
Failed ioremap_nocache shared_mem_paddr! <--- M4 not being defined
snvs_rtc 20cc000.snvs:snvs-rtc-lp: setting system clock to 1970-01-01 00:00:01 UTC (1)
VLDO2: disabling
wlan-en-regulator: disabling
PSU-5V0: disabling
clk: Not disabling unused clocks
Waiting for root device /dev/mmcblk0p2... <--- SDcard not loading fs... I think this is due to sdhci-esdhc-imx 2198000.usdhc: No vqmmc regulator found
random: nonblocking pool is initialized
Hi Tim
from log : "cpu cpu0: dev_pm_opp_get_opp_count: device OPP not found (-19)"
seems dts file (like imx6sx-sdb.dts) is not defined, it contains core operatings points.
Note, if this is custom board first necessary to run ddr test
i.MX6/7 DDR Stress Test Tool V2.51
find new ddr settings then rebuild uboot image with new settings included in
uboot/board/freescale/mx6sxsabresd/*.cfg file
For flashing images recommended to use MFG Tools (use *.vbs for appropriate board)
Programmers (Flash, etc.) (10)
IMX6_L4.1.15_MFG_TOOL (REV L4.1.15_1.0.0)
SABRE Board Reference Design|NXP
For i.MX6SX Sabre SD board one can try Demo images on that link
Board Support Packages (35)
L4.1.15_1.0.0_iMX6SX (REV L4.1.15_1.0.0)
Best regards
igor
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The board is a Udoo Neo and 3.14 has been working on the board using the same u-boot to boot the processor
cpu is defined:
&cpu0 {
operating-points = <
/* kHz uV */
996000 1250000
792000 1175000
396000 1175000
198000 1175000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC uV */
996000 1250000
792000 1175000
396000 1175000
198000 1175000
>;
arm-supply = <&sw1a_reg>;
soc-supply = <&sw1a_reg>;
fsl,arm-soc-shared = <1>;
};
looking at the code in imx6q-cpufreq.c
static int imx6q_cpufreq_probe(struct platform_device *pdev)
{
.....
num = dev_pm_opp_get_opp_count(cpu_dev); <--cpu-dev does exist in this context but not in the upper layer why because num is less then zero..
if (num < 0) {
rtet = of_init_opp_table(cpu_dev);
if (ret < 0) {
dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
goto put_node;
}