Hello,
I used the following code to write to the CPMEM region of the IPU. But as soon as I reached 'writel' function the O/S hangs. I do not get a kernel panic. But it just hangs there.
void imx_fill_cpmem(struct cpmem_word *cpmem, char channel)
{
int w, d;
void *addr = (((struct ipu_ch_param *)ioremap(MX6Q_IPU1_ARB_BASE_ADDR + 0x00200000 + 0x00100000 + 0, SZ_128K)) + (channel));
if(addr && cpmem)
{
for(w=0; w < 2; w++)
{
for(d=0; d < 5; d++)
{
pr_alert("%s: Check point *3\n",__func__);
pr_alert("%s: Address: 0x%p -> Data: 0x%x \n",__func__,addr,cpmem->word[w].data[d]);
writel(cpmem->word[w].data[d], addr);
addr += 4;
pr_alert("%s: Check point 4\n",__func__);
pr_alert("%s: Word_no: 0x%x -> Data_no: 0x%x \n",__func__,w,d);
}
addr += 12;
}
}
}
As soon as the system hangs the following gets printed in the console.
imx_fill_cpmem: Check point *3
imx_fill_cpmem: Address: 0xc0b00000 -> Data: 0xf40d8000
Can someone let me know what mistake I am doing here?
Thank you.
Solved! Go to Solution.
For iMX6, IPU registers start from 0x02600000, and CPMEM is at 0x02700000.
The code defined "REGS_IPU1_BASE (0x02400000)" is based on old document, but when access registers, it will always add offset 0x00200000. In new document, the IPU1 address had been changed to 0x02600000.
Software haven't update to this base address, there is no function impact, because the software will always use 0x02400000 + 0x00200000 to access IPU registers.
IPU1 CPMEM start address is 0x0270_0000, please check it for the case.
Also, please refer to the Platform SDK how to access the CPMEM :
C-functions ipu_cpmem_set_field(), ipu_cpmem_mod_field().
The SDK link :
"Bare-metal SDK for the i.MX 6 series, including reusable drivers and tests for
many peripherals, and much example code. Also includes register definition
headers files, and register definitions for debuggers"
https://www.freescale.com/webapp/Download?colCode=i.MX6_PLATFORM_SDK&location=null
Have a great day,
Yuri
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Hello,
Thank you for your answer.
I read in this post What is the address of CPMEM that the CPMEM location is 0x02700000. I even added a debug message in ipu_common.h and there also I saw that it is 0x02700000. So I am getting mixed answers here...
I can see in the Reference Manual that the base address for the module is 0x02600000 for IPU1. But in all the header files in SDK the base address was defined as 0x02400000..
From SDK. (regsipu.h)
#define REGS_IPU1_BASE (0x02400000) //!< Base address for IPU instance number 1.
Please clear this issue if possible...
For iMX6, IPU registers start from 0x02600000, and CPMEM is at 0x02700000.
The code defined "REGS_IPU1_BASE (0x02400000)" is based on old document, but when access registers, it will always add offset 0x00200000. In new document, the IPU1 address had been changed to 0x02600000.
Software haven't update to this base address, there is no function impact, because the software will always use 0x02400000 + 0x00200000 to access IPU registers.