Warping on video output: imx8qm

[lorenzo_sarchi]

Good morning,

I need to make the warping on the imx8x, for 2 video output.

Looking by example in the document iMX8QM_RM_Rev_F.pdf for the imx8qm, I can see that some registers for managing the warping are mentioned.

At pag. 7562 there are indeed some interesting registers, that I could move by example with: /./unit_test/memtool <address>=<value>

An interesting registers seem to be by example: Start Value X for arbitrary warping, at Offset 195Ch.

But I have not understood the address to start. If I go at the beginning of the chapter, pag. 7550, I see DC base address: 0h, that's not the base address I am looking for.

I could imagine the base address could be 0x56000000 , as reported at pag. 40 DC mapped

Neverless, doing by example:

/unit_tests# ./memtool 0x5600195c 8 , I get error

So, important question is: which is the base address to start, in order to add the offset for the interesting registers and trying to manage the warping?
Could you pls clarify us in the register warping management?

Best Regards,

Lorenzo 

[fmonte]

Depending on the SCU partitioning, it may be possible or not to access some registers from the/a Linux partition.

On 8QM I tried to access several (unrelated) registers, what I got is that:

 - some registers can be accessed only from SCU (eg. md.b 0xADDRESS), but not from Linux/FreeRTOS

 - others can be accessed only from Linux (eg. using busybox devmem applet) or from FreeRTOS (using an absolute memory access) - depending on the resources partitioning

 - some registers can be accessed both from SCU and Linux

I do not know the logic (yet), I hope NXP will clarify this in an application note.

Francesco

[lorenzo_sarchi]

Hello Igor,

Probably you can help us.

I was wondering about the correct DC BaseAddress, but we have now another doubt, related to the "memtool" utility itself.

Doing by example: memtool 0x56000000 8 , I can read something and the tool seems to be working.

(that's the reason I was indeed wondering about the register address).

Nevertheless, doing by example: ./memtool UART1.*    ,  or   ./memtool UART1.UMCR ,

we get instead: 

SOC: i.MX8QM   Unknown SOC.

So we now think the the "memtool" utility could not be  working for imx8qm.

At the following link:  [meta-freescale] [PATCH v2 42/43] imx-test: Add i.MX 8 support 

we see that the imx8 should be added.

But now we have the doubt that probably not all the sockets are supported  (maybe only imx8qm is supported).

Could you pls inform us of the supported IMX8 socket by memtool ?

In case it is not supported, which is your suggested method for reading and writing registers in imx8qm / imx8x ?

(pls consider we have an image built with yocto/qt5/weston).

Thanks in advance and Best Regards

Lorenzo

[igorpadykov]

Hi Lorenzo

regarding:

-----

At the following link:  [meta-freescale] [PATCH v2 42/43] imx-test: Add i.MX 8 support 

we see that the imx8 should be added.

-----

this is very vague statement as " imx8" comprises dozen very different family processors

i.MX 8 Series Applications Processors | Arm® Cortex®-A72/A53/A35/M4 cores | NXP 

Based on latest memtool sources only i.MX8MQ family is supported

memtool\test - imx-test - i.MX Driver Test Application Software 

Best regards
igor

[lorenzo_sarchi]

Thanks Igor for your clarification,

Which is then your suggested method for reading and writing warping registers in imx8qm / imx8x ?

(pls consider we have an image built with yocto/qt5/weston).

Better from user space? Or maybe directly in kernel space?

Thanks and Best Regards,

Lorenzo

[nxf54947]

Hello lorenzo.sarchi@mta.it‌,

It is recommended to read/write warping registers from user space. However, please keep in mind that no all the mechanisms completely deployed  since they are still on development process.

Best regards, 

Ruben

[lorenzo_sarchi]

Hi Ruben,

Thanks for your suggestion, it comfirms what I thought till the beginning.

But I still cannot understand how to manage it.

At the beginning, I was wondering about a bad interpretation of the Reference Manual, maybe someything that I could miss. I repeat the question;

"

Looking by example in the document iMX8QM_RM_Rev_F.pdf for the imx8qm, I can see that some registers for managing the warping are mentioned.

At pag. 7562 there are indeed some interesting registers, that I could move by example with: /./unit_test/memtool <address>=<value>

An interesting registers seem to be by example: Start Value X for arbitrary warping, at Offset 195Ch.

But I have not understood the address to start. If I go at the beginning of the chapter, pag. 7550, I see DC base address: 0h, that's not the base address I am looking for.

I could imagine the base address could be 0x56000000 , as reported at pag. 40 DC mapped

Neverless, doing by example:

/unit_tests# ./memtool 0x5600195c 8 , I get error

"

Nevertheless, we then discovered that  the "memtool" utility doesn't work in the i.MX8QM  (last reply from Igor Padykov, in the same ticket).

So, the questions are still:

1. How to get access to these registers from user space? 

If memtool doesn't work, I think that doing a memory mapping ourself, we should get the same result/error; probably there could be something else.

2. My interpretation of the base address (0x56000000) is correct? I have doubts also to it, as explained above and in the ticket.

Considering that memtool (using memmap) doesn't work and we have doubts about the base address, could you pls explain us how to get access to these registers from user space?

Thanks in advance & Best Regards,

Lorenzo

[lorenzo_sarchi]

Thanks Igor,

I got the mentioned AN12631, I would need the JSC too.

Anyway, meantime we should get the tools, what are your suggestions about writing registers with a proper module?

I have not yet understood why some registers cannot be seen/read from userspace, not yet clear.

I am not sure too of my interpration of the   Coyld you pls solve my doubt about the interpretation of the above "Start Value X for arbitrary warping", at Offset 195Ch" ould you pls clarify me about the base address?

Best Regards,

Lorenzo

[igorpadykov]

Hi Lorenzo

base addresses can be found in Table 2-2. System memory map Reference Manual..

One can try to read registers using debugger and AN12631

Normal and Secure Debug for i.MX8/8X Family of Applications Processors

For access to these registers from user space seems it is necessary to write some

custom application.

Best regards
igor

[lorenzo_sarchi]

Thanks a lot Igor,

I have downloaded the package and built the dpu_warp.elf, but I see it come with m4.

In our environment, we have built an image with Yocto /embedded linux /A53.

So I am not sure how to use it in our environment, where we also have Weston.

And trying to understand the warping register address (fetchwarp9 by example), I am then not able to manage them with the "memtool" utility.

Could you pls confirm me that the mentioned warping registers can be managed by the A53 through the "memtool" utility? 

(I now doubt they could be reserved for m4 only),

If yes, which is the correct base address ?

I have seen by example:   Start Value X for arbitrary warping, at Offset 195C;

but the BaseAddress (for which the offset should be reckoned) is not clear to me (probably I made an error).

Thanks in advance and Best Regards,

Lorenzo

[igorpadykov]

Hi Lorenzo 

for i.MX8QM warp example one can look at

SDK_MEK-MIMX8QM (folder ../mekmimx8qm/driver_examples/dpu/warp)

Welcome | MCUXpresso SDK Builder 

Best regards
igor
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