Some Experience When Enable MIPI Camera

[shaojun_wang]

1. Debug steps for customer MIPI sensor

Debug steps for customer MIPI sensor.docx is the doc about how to debug MIPI sensor.

2. SabreSD default setting

In SabreSD board, ov5642 is connected to CSI0 parallel port, ov5640_mipi is connected to MIPI CSI port.

In BSP default setting, ov5640_mipi is routed to IPU0, CSI1. According to the doc, the virtual channel in MX6x side is 1, so virtual channel 1 should be enabled in camera sensor side. In driver ov5640_mipi.c, the code is “ov5640_set_virtual_channel(ov5640_data.csi)”.

3. MIPI DPHY clock setting

According to the doc,  MIPI DPHY clock should match camera sensor clock.

If the clocks are not matched, the MX6x MIPI_CSI Error state register MIPI_CSI_ERR1 is not 0, it would be 0x3, “Start of Transmission Error on data lane”.

So when enable new MIPI camera, need to measure the frequency of clock lane, or calculate from the related sensor register, then configure MPII DPHY clock.

For example, if the clock lane frequency is 128MHz, the clock range should be 250-270MHz because of DDR clock mode, so write 0x08 to CSI2_PHY_TST_CTRL1. One function of MIPI_CSI_PHY_TST_CTRL1 is setting the MIPI DPHY clock, this function is not described in MX6DQ RM revD.

The patch is

diff --git a/drivers/mxc/mipi/mxc_mipi_csi2.c b/drivers/mxc/mipi/mxc_mipi_csi2.c

index 1f051df..d53aaf5

--- a/drivers/mxc/mipi/mxc_mipi_csi2.c

+++ b/drivers/mxc/mipi/mxc_mipi_csi2.c

@@ -286,7 +286,7 @@ int mipi_csi2_reset(struct mipi_csi2_info *info)

mipi_csi2_write(info, 0x00000002, CSI2_PHY_TST_CTRL0);

mipi_csi2_write(info, 0x00010044, CSI2_PHY_TST_CTRL1);

mipi_csi2_write(info, 0x00000000, CSI2_PHY_TST_CTRL0);

- mipi_csi2_write(info, 0x00000014, CSI2_PHY_TST_CTRL1);

+ mipi_csi2_write(info, 0x00000008, CSI2_PHY_TST_CTRL1);

mipi_csi2_write(info, 0x00000002, CSI2_PHY_TST_CTRL0);

mipi_csi2_write(info, 0x00000000, CSI2_PHY_TST_CTRL0);

4. Virtual channel

For some mipi camera sensor, such as Samsung s5k4ec, the virtual channel is fixed to 0, there is no register in the sensor to configure it to other value.

We can configure the mipi camera to IPU0 CSI0 so the virtual channel in MX6 side is 0.

If virtual channel in camera side and MX6 side is not same, there is no error in mipi state and error register, but we will see below log when mx6 capture image

        ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
        VIDIOC_DQBUF failed.

5. Mipi and CSI camera on same CSI port

If the parallel sensor is connected to CSI0 in the board, to enable dual camera, need to apply patch 0001-support-mipi-and-parallel-camera-on-same-csi-port.patch

Original Attachment has been moved to: 0001-support-mipi-and-parallel-camera-on-same-csi-port.patch.zip

[toanjunifer]

Thank you for your sharing !

[peteramond]

Dear ShaojunWang,

Your discussion is very helpful.

I'm using the ADV7280M chip in a new design. Currently I have a IMX6 Quad Sabre Lite development board and I'm trying to decode one CVBS input to feed iMax MIPI using the circuit which I was made from ADV7280M. I connected ADV7280M with iMAX6 using I2C and MIPI data lane.Also, I have Linux distribution that has an adv7180_mipi.c driver.

1.       Does this driver compatible with ADV 7280M ? Does Analog Devices have a Linux driver for ADV7280M ? Are you aware of any other driver support or how this driver can be used to stream video from the ADV7280M ? Can you tell me the way of combining ADV7280M with Video 4 Linux architecture ?
2.       As well as it is not possible to run the script given here  ADV7280 / ADV7280-M Design Support Files | EngineerZone for ADV7280M development board as I have made my PCB using only ADV7280M chip. There is no usb data communication and I'm just using I2C and MIPI data and clk pins of the chip to communicate with iMAX6. So I need to address the registers of the ADV7280M chip in a different way( Not like in Script). So can you tell me how should I address for each and every registers of the chip using I2C or provide some reference materials ?

Thank You,

Peter.

[jasongaiser]

Hi Peter, 

Did you ever have any luck getting the adv7280-m working?

Thanks!

[rejeeshbabu]

Hello Wang and All,

I am developing V4L2 image sensor driver for a custom sensor.

Platform details are:

Board : HummingBoard-i2eX (i.MX6 Dual)

OS      : Ubuntu, Linux Kernel 3.0.35

Sensor details:

1. Supported MIPI lanes : 2 Lane/4 Lane (configured to use 2 lane mode)

2. Supported MIPI data format : RAW 10 /RAW8 (configured to use RAW10)

3. Virtual channel : configured to 0

4. Clock Frequency : 24MHz (This is actually sensor clock, MIPI clock is 114 MHz)

5. Resolution : 1280 x 720

I am getting error "ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0" for  VIDIOC_DQBUF IOCTL.

To begin my trouble shooting, I would like to get my below board configuration file modifications reviewed:

//Sensor details

static struct fsl_mxc_camera_platform_data mipi_csi2_data = {

  .mclk = 24000000, // Is this OK ? Or should I put the MIPI clock(114 MHz) here?

  .mclk_source = 0, // Does this indicate HB MIPI clock source is sensor?

  .csi = 0, // Does this indicate camera sensor is using IPU #1/CSI0 ?

  .io_init = mx6q_csi0_io_init, // I use this function to Enable mipi to IPU1 CSI0 (mxc_iomux_set_gpr_register(1, 19, 1, 0))

};

Since this structure definition doesn't have any documentation, I did not understand the meaning of these parameters. Please explain me these parameters if anybody is aware of.

//Details of MIPI CSI2 interface

static struct mipi_csi2_platform_data mipi_csi2_pdata = {

       .ipu_id   = 0,

       .csi_id = 0,

         .v_channel = 0,

       .lanes =2,

         .dphy_clk = "mipi_pllref_clk",

         .pixel_clk = "emi_clk",

};

/*Details of capture device*/

static struct fsl_mxc_capture_platform_data capture_data[] = {

   {

        .csi = 0,

        .ipu = 0,

        .mclk_source = 0,

        .is_mipi = 1,

    },   

};

Actually, I took these values from another sensor patch, i dont really know what these parameters are :smileyhappy:

Now, assuming that my board configuration is ok, I went ahead with driver debugging. Below are the observations:

1. I2C communication is ok

2. MIPI_CSI_PHY_STATE value is : 630,sometimes 330,300 also (Is this ok or is it indicating any clock related issue?)

3. MIPI_CSI_ERR1/2 both return 0

Any hints to my issue? Can someone direct me how to proceed with debugging?

I am following the document attached in this thread to debug, however I didnt find any apis in mxc_mipi driver to read other registers

(MIPI_CSI_N_LANES ~ MIPI_CSI_DATA_IDS_2). I saw only apis to read MIPI_CSI_PHY_STATE and  MIPI_CSI_ERR1/2 registers. Can someone guide me on how to read the other registers (also, IPU registers) ?

[rejeeshbabu]

Hi All,

I managed to read those registers mentioned in the debug doc. One thing I quickly noticed is that, value of  IPU1_CONF suggest that CSI0 if IPU1 is disabled (which is what I am trying to use!). Can somebdy let me know how to enable CSI0 if IPU1 (just writing to this bit from sensor driver is OK?).

Also, it would be great if  someone could check the values of other registers as well and make more suggestions.

MIPI_CSI_N_LANES : 0x 1

MIPI_CSI_PHY_SHUTDOWNZ : 0x 1

MIPI_CSI_DPHY_RSTZ : 0x 1

MIPI_CSI_CSI2_RESETN : 0x 1

MIPI_CSI_PHY_STATE : 0x 630

MIPI_CSI_DATA_IDS_1 : 0x 0

MIPI_CSI_DATA_IDS_2 : 0x 0

IPU1_CONF : 0x660

IPUx_INT_STAT_1 : 0x800000

IPUx_CSI0_DI : 0xffffffff

IPU1_CSI0_SENS_CONF : 0x 0

IPU1_CSI0_SENS_FRM_SIZE : 0x 0

IPU1_CSI0_ACT_FRM_SIZE : 0x1df027f

[aravinthkumarja]

Hi Rejeesh Babu,

     are you able to solved this issue.?

[rejeeshbabu]

No Aravind, still stuck with it; my current understanding is that the issue is due to the fact that my sensor supports only RAW10 output format and there seems to be little or no support for RAW format in Freescale V4L2 BSP (I am not sure about it, just  a wild guess :smileyhappy:).

If anybody has patch for RAW format in Kernel 3.0.35, please share. :smileyhappy:

[motting]

Hi Reejsh Babu,

I am in the same situation as you were.

I followed your steps and found that my CSI0 of IPU0 is not enabled (IPU_CONF = 0x1b00)!

Have you finally solved this issue?

If yes, could you share with us how you solved this issue?

Thanks,

Motti

[rejeeshbabu]

Hi Motti,

What I understood is that, by default, BSP configure to use CSI1 of IPU0. So, rather than trying to change this setting, I changed the virtual channel of my sensor to 1 (IPU0,CSI1).So, if virtual channel can be configured for your sensor, I suggest you to try this.

Please note that I changed to latest Linux kernel (3.14) as well which I thought helped me more as it has better RAW format support.See my original post here:

https://community.freescale.com/thread/384852

Regards,
Rejeesh

[himanshugusain]

Hi

I have received ov5640 mipi camera from truly ,I have done the basic i2c initalization

till the point where it shows "camera ov5640_mipi is found"

How further testing of camera module can be done in Android running on Sabresd patform

[takashitakahash]

I have 4. Virtual channel related question.

Related to 4. Virtual channel of community links, and there is a patch of sharing MIPI CSI-2 and Parallel.

I refer to this patch, Parallel and MIPI CSI-2 acquisition at the same time can be input ? Or be switched?

If that can be achieved for a parallel input and MIPI input,Is it may be a recognition that can capture both the total bandwidth is at 240MHz or less?

@

[nagendrasarma]

hi all,

good information wrt csi-mipi camera

i am working with toshiba hdmi-mipi bridge in 2-lane mode with imx-6 (3.10.17 kernel).

i have following error wrt the driver,

0 mipi csi2 dphy status 230

1 mipi csi2 dphy status 230

2 mipi csi2 dphy status 230

3 mipi csi2 dphy status 230

4 mipi csi2 dphy status 230

5 mipi csi2 dphy status 230

6 mipi csi2 dphy status 230

7 mipi csi2 dphy status 230

8 mipi csi2 dphy status 230

9 mipi csi2 dphy status 230

0 mipi csi2 err1 10000010

....

....

using ipu-0, csi-1 (2 lane)

i have observed clock, D0(+/-) D1(+/-) toggling from mipi bridge

but my gstreamer pipeline giving error "ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0"

can somebody help me how to solve this ?

regards

nagendra

[richarddestiny]

Hi，sarma

         mipi csi2 dphy status 0x230 ,how did you fix this problem

[nagendrasarma]

hi all

i am able to capture image from my hdmi-mipi bridge

but found  the image captured is tiled and out of sync

can anybody help me how to solve this ?

mipi bridge is giving 422 output, gstreamer capturing in I420 format

regards

nagendra

[michaelsadikov]

Hi all!

I am trying to write a custom mipi camera module connect to imx6q sabre lite (nitrogen6q) board.

The custom camera's details are:

Sony imx139, 2 data lanes.

For my mipi camera sensor there is no register to configure virtual channel.

I think what the virtual channel is fixed to 0.

How can I configure CSI and IPU to set virtual channel to 0 in iMX6q side?

in the board-mx6_nitrogen6x.c I wrote:

.......

mxc_iomux_set_gpr_register(1, 19, 1, 1);

.......

and

.......

{
        .ipu = 0,
        .csi = 0,
        .mclk_source = 0,
        .is_mipi = 1,
},

.......

It is correct?

Thanks a lot!

[DraganOstojic]

Michael, try to use the patch that is attached at the beginning of this thread. I tried it and it worked fine when I left my mipi camera output on vc=0.

[davemcmordie]

H Michael,

I am now struggling to do the same thing (get the MIPI->IPU/CSI routing

correct) with my baseboard, having moved on from the Wanboard

configuration. Here’s what I see in the IMX6Q reference manual, page

1928:

****

• *

The reset values are 0, 0. Double check your sensor datasheet for the

virtual channel address, but if it is zero, the default configuration of

the board (GPR1 bit 19 = 0, bit 20 = 0) would have route MIPI virtual

channel 0 to IPU1 CSI0. On that basis I think you want to do:

mxc_iomux_set_gpr_register(1, 19, 1, 0);

But as I say I am not having much luck as I make my camera work with a

different baseboard, so I may have this wrong.

HTH,

Dave

From: Michael Sadikov

Sent: October-09-13 10:19 AM

To: Dave McMordie

Subject: Re: - Some Experience When Enable MIPI Camera

<https://community.freescale.com/>

Some Experience When Enable MIPI Camera

reply from Michael

Sadikov<https://community.freescale.com/people/michaelsadikov?et=watches.email.thread>in

i.MX Community - View the full

discussion<https://community.freescale.com/message/354860?et=watches.email.thread#354860>

[davemcmordie]

Thanks Shaojun!  This has been a big help.

I am at the situation with the OV5647 where the MIPI phy seems to be synchronized: the state is 0x300 and both ERR1 and ERR2 registers are 0x0.  However, I am not receiving images (ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0).  Could this be because of problems on the MIPI bus, or can I rule that out at this point, based on the state and error registers?

Regards,

Dave

[hyunjaejun]

hi Dave ~

I also have a same problem...  I use a 8M camera.

Is it solve a problem??

[floriang]

Hi Shaojun,

I am having some troubles displaying both camera at the same time with camera overlay in SABRESD_6DQ board.

I wonder if your post hold the solution somewhere...

1. In [2. SabreSD default setting] you say that

> In SabreSD board, ov5642 is connected to CSI0 parallel port, ov5640_mipi is connected to MIPI CSI port.

How did you find this out? I can't see anywhere which camera i have on my board (we bought from freescale). looking at /dev/video* doesn't give much information, and I tried querying the capabilities in v4l2, but I "name" and "bus_info" are empty!

The only thing I know is that I am able to display each camera separately, if I open only one at a time.

2. Then you say that "virtual channel 1 should be enabled in camera sensor side"

Do you mean that we should replace "ov5640_set_virtual_channel(ov5640_data.csi)" by "ov5640_set_virtual_channel(1)" ?

Here is the post with my original problem:

Display both camera with android 4.2.2 on sabresd_6dq (imx6)

I am on android, but basically the kernel code seems to be the same

Thanks