Sgtl5000 audio codec Mclock Problem

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Sgtl5000 audio codec Mclock Problem

2,224 Views
kondaveetiarung
Contributor II

Hi,

Currently iam working on SGTL5000 Codec Interfacing to imx6 sololite Processor.I got /dev/dsp node and in cat /proc/sound/devices it is showing sgtl5000 Codec Information.In mclock pin it is unable to generate the clock from SOC Pins.Please clarify my doubts.

My DTSI FILE:

audmux: audmux@021d8000 {
                                        compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux";
                                        reg = <0x021d8000 0x4000>;
                                        /*
                                        status = "disabled";
                                        */
                                };

                                i2c2: i2c@021a4000 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
                                        reg = <0x021a4000 0x4000>;
                                        interrupts = <0 37 0x04>;
                                        clocks = <&clks IMX6SL_CLK_I2C2>;
                                        status = "disabled";
                                };

 i2c2 {
                        pinctrl_i2c2_1: i2c2grp-1 {
                                fsl,pins = <
                                        MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
                                        MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
                                >;
                        };
                };

audmux {
                        pinctrl_audmux_1: audmux-1 {
                                fsl,pins = <
                                        MX6SL_PAD_AUD_RXD__AUD3_RXD       0x0130b0     /*0x4130B0*/
                                        MX6SL_PAD_AUD_TXC__AUD3_TXC       0x0130b0     /*0x4130B0*/
                                        MX6SL_PAD_AUD_TXD__AUD3_TXD       0x0130b0     /*0x4110B0*/
                                        MX6SL_PAD_AUD_TXFS__AUD3_TXFS     0x0130b0     /*0x4130B0*/
                                        MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x0130b0     /*0x4130B0*/

My DTS FILE

sound {
        compatible = "fsl,imx-audio-sgtl5000";
        model ="sgtl5000";

        /*
        cpu-dai = <&ssi1>;
        CPU DAI Replaced with ssi-controller
*/

        ssi-controller = <&ssi1>;
        audio-codec = <&sgtl5000>;
        audio-routing =

        "MIC_IN", "Mic Jack",
        "Mic Jack", "Mic Bias",
        "Headphone Jack", "HP_OUT";

         mux-int-port = <2>;
         mux-ext-port = <3>;
        /*                                               
        hp-det-gpios = <&gpio2 0 0>;                                      
        
        hp-det-debounce = <250>;     
        */
};

&audmux {

        #address-cells=<1>;
        #size-cells=<1>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_audmux_1>;
        status = "okay";
};

clock-frequency = <100000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2_1>;
        status = "okay";
        /*DT Binding for CODEC DAI DRIVER


         sgtl5000:codec@0a {
        compatible = "fsl,sgtl5000";
        reg = <0x0a>;

iam able to probe both the codec and IMX SOC Driver successfully but the IT is showing like this

Device with ID register ffff is not a sgtl5000

1)Why is showing like this.

2)when iam connect to oscilloscope to Audio M Clock it is not showing the clocks from soc.

3)when iam connect to oscilloscope to i2c clock  it is not showing the clocks from soc.

Please clarify my doubts.why it is not generating the clocks and why it is showing the Device id register is not a sgtl.

Please clarify my doubts.



                                        

5 Replies

1,288 Views
igorpadykov
NXP Employee
NXP Employee

Hi kondaveeti

nxp does not use sgtl5000 for i.MX6SL reference board, however it is used on some third party,

like imx6qdl-nit6xlite.dtsi. mclk is generated from clko pad:

MX6QDL_PAD_GPIO_0__CCM_CLKO1        0x000b0        /* sys_mclk */ 

linux-imx6/imx6qdl-nit6xlite.dtsi at boundary-imx_4.1.15_1.0.0_ga · boundarydevices/linux-imx6 · Git... 

Best regards
igor
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1,288 Views
kondaveetiarung
Contributor II

HI igor,

Thank you for your Valuable Reply.

Could you explain little bit in depth.

In imx6 sololite processor Mclock is generating is 0 cloks right?

how can i use mclock pin in imx6 sololite processor for generating m clocks signals for audio.

how can i generate m clock signals for audio in imx6 sololite processor?

could you please send some piece of code for generating clock signals for audio.

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1,288 Views
kondaveetiarung
Contributor II

HI,

Please give your Valubale Reply.

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1,288 Views
igorpadykov
NXP Employee
NXP Employee

Hi kondaveeti

please check AN4952 i.MX 6 Audio Clock Configuration Option

http://www.nxp.com/assets/documents/data/en/application-notes/AN4952.pdf 

Connect clock input to MCLK of I2S communication - Toradex Community 

Best regards
igor

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1,288 Views
kondaveetiarung
Contributor II

Hi

Thank you for your valuable Reply.i did not get the clock for i2c clock and mclock.iam new to audio drivers.

Please tell me how to generate clocks using gpio pins or PLL..

You said clk o pad..please tell me how to use clko pads for generating clocks for m clocks and i2c communications.

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