Im using IMX53 with L2.6.35_11.09.01_ER_source BSP.
I have connected to CPU two audio codecs. First to AUDMUX4 and second to AUDMUX5. First of them uses SSI1, second SSI2.
When i play music on SSI2->AUDMUX5 everything is fine.
When i try on SSI1->AUDMUX4 i get a little distortion cosed propably by zeros in audio stream coming out from imx. I get errors on console like below:
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=184001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=185001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=186001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=187001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=188001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=189001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=190001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=191001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=192001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=193001
imx_ssi_irq mxc_ssi SISR 323 SIER 180100 fifo_errs=194001
...
This are interrupts from SSI1 whitch tels about fifo underrun I think.
Do anybody help me with this issue?
I have almost the same case. I use AdeneoEmbedded kernel (Release 4.2). There is a SGTL5000 codec connected to SSI2 via AUDMUX5 and a GSM modem (DVI port) connected to SSI1 via AUDMUX3. Sample rate is 8kHz, 16-bit, I2S. Modem is master. Play buffer of SSI is located in IRAM. So when I start sending data and the DMA controller starts transfers, SSI reports multiple TX underruns. About 110 per 100 ms or 1600 slots
imx_ssi_irq mxc_ssi SISR 1a0 SIER 180100 fifo_errs=1
It seems that DMA controller fails to fetch data in time... What could it be??
The answer is located here: https://community.freescale.com/docs/DOC-93857
"The root cause of this issue is that SSI1/3 use SDMA, and also use IPMUX, but there is not the clock dependency between SDMA and IPMUX, so sometimes IPMUX clock is closed automatically"
I've applied the patch and underruns are gone.