RT1060 HyperRAM+QSPINAND

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

RT1060 HyperRAM+QSPINAND

1,134 Views
RichardY
Contributor II

Hi all,

I am developing my custom board. I am running out of I/Os on RT1060. I realized that I will be able to save I/Os by using the serial RAM (HyperRAM) instead of parallel SDRAM. But we are not sure if this would work

My Configuration:

a. QSPINAND on flexspi1 to store the binary.

b. HyperRAM on flexspi2. Executing the binary from here and also put the stack and heap here.

I have a few questions.

1. Is it possible to execute binary from HyperRAM and also put stack and heap on it? As NXP also provided a example of polling transfer to HyperRAM and it is difficult for us to try out this configuration on any of the evaluation board.

2. We realized that HyperRAM/flexspi needs to be configured before using. Would be able to easily debug the code on HyperRAM? or does MCU-link support configuring the HyperRAM/flexspi before downloading & executing the binary from HyperRAM? We are currently using MCUXpresso. 

 

Thanks and regards,

Richard

Labels (1)
0 Kudos
Reply
3 Replies

1,114 Views
Yuri
NXP Employee
NXP Employee

@RichardY 
Hello,

  I have some doubts if i.MX RT1060 supports Serial NAND and HyperBus.
According the i.MX RT1060 Reference Manual (RM) FlexSPI supports (only)
Serial NOR Flash or other device with similar SPI protocol as Serial NOR Flash.
Note, i.MX RT1050 RM and RT1170 RM state about Serial NAND Flash
and HyperBus using explicitly.

Regards,
Yuri.

0 Kudos
Reply

1,107 Views
RichardY
Contributor II

Hi @Yuri,

Thank you for your prompt reply.

We were planning to use RT1050, but we run out of the I/Os so we are considering RT1060 to use serial RAM and flash at the same time. I realized that Hyper bus example is not given in the reference manual of RT1060. However, our configuration is based on section 3.3.1 in AN12240 Enhanced Features in i.MX RT1060 (nxp.com).

RichardY_1-1643058068597.png

Would you be able to check with your engineers on this configuration? Would NXP recommend this configuration? 

a. QSPINAND on flexspi1 to store the binary.

b. HyperRAM on flexspi2. Executing the binary from here and also put the stack and heap here.

Thanks and regards,

Richard 

 

0 Kudos
Reply

1,034 Views
Yuri
NXP Employee
NXP Employee

@RichardY 
Hello,

  RT1060 FlexSPI supports NAND, looks it is wrongly updated RM. We will fix it in newer revision.

Note:
   RT10xx does only support boot to internal SRAMs (xTCM/OCRAMs), external RAM not really supported. It will require cooperation of DCD + application code. DCD can be used to initialize external RAM memory interface (FlexSPI) and application startup can copy the code from non-volitile memory (FelxSPI dedicated QSPI flash) to external RAM, and then execute code.

Regards,
Yuri.

0 Kudos
Reply