Question, i.MX6SoloLite boot image parameters

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

Question, i.MX6SoloLite boot image parameters

1,162 次查看
Aemj
Contributor IV

Dear team,

I would like to ask about the meaning of parameters used in IVT and Boot Data structure of i.MX6SL boot image.

(Q1)

My customer is developing their board with i.MX6SoloLite. For i.MX6SL, my customer believes that the value of ‘header’ should be 0xD100 2040h.

Is it true?

(Q2)

As for the value of ‘entry', which of the address on OCRAM or on Boot-Device does the value specify?

(Q3)

As for ‘start’ in Boot Data structure,

Does the value specify the address in Boot Device relative to its Boot device base?

If so, the ‘start’ contains the value of zero always.

Correct?

(Q4)

According to the Figure-4 ‘Typical memory layout of an Unsigned Image’ in AN4581 Rev.0, the ‘lenth’ seems to be the length from the top to the end of Image Data.

Not only the length of Image Data.

Is it true?

(Q5)

In my customer’s use-case, they will not use secure-boot.

They thinks all of ‘self’, ‘plugin flag’ and ‘csf’ can be value of zero.

Correct?

Thanks,

Miyamoto

标签 (1)
0 项奖励
回复
5 回复数

953 次查看
Yuri
NXP Employee
NXP Employee

HAB 4.1

~Yuri.

0 项奖励
回复

953 次查看
Aemj
Contributor IV

Hi Yuri,

Thanks for your answer.

1.

Can i understand that the 'version' included in the header is 'HAB version'?

Where can I find the 'HAB version' of the chip?

Thanks,

miyamoto

0 项奖励
回复

953 次查看
Yuri
NXP Employee
NXP Employee

Hi,

yes - HAB version, please refer to Appendix D (HAB Version/Chip matrix)

of the recent AN4581,  Rev. 1, 10/2015.

http://cache.nxp.com/files/32bit/doc/app_note/AN4581.pd

Regards,

Yuri.

0 项奖励
回复

953 次查看
Aemj
Contributor IV

Hi Yuri,

The appendix-d only shows the HAB Ver. for Rev. 1.0 chip, MCIMX6LxxxxxxxA, of i.MX6SL.

How about Rev.1.2 chip of i.MX6SL?

Thanks,

Miyamoto

0 项奖励
回复

953 次查看
Yuri
NXP Employee
NXP Employee

Hello,

  Please look at my comments below.

1.
  Please refer to Table 8-22 (IVT Header Format) of the i.MX6 SL RM.

The IVT header includes three field : Tag, Length, Version.

The field version may depend on boot ROM version : so,

0xD100_2040 or 0xD100_2041

  Also, please refer to Table 8-25 (DCD Header) of the i.MX6 SL RM.

The DCD header includes three fields : Tag, Length, Version.
The field Length depends on length of the DCD ;

version may depend on boot ROM version.

2.
  The field “entry” is absolute address of the first instruction in memory

(OCRAM or DRAM).

3.

  The field “start” of the Boot Data Structure is address in the memory,
where boot code is loaded.

4.
  Correct, “length” is total image length.

5.

  Yes, ‘self’, ‘plugin flag’ and ‘csf’ can be value of zero.

Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------