Question, i.MX6SX eMMC boot - SD port selection

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Question, i.MX6SX eMMC boot - SD port selection

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981 次查看
SLICE
Contributor IV

Dear team,

I would like to ask about eMMC boot of i.MX6SX.

In reference manual of i.MX6SX(IMX6SXRM, Rev.1), the following description is written in Table-5-6.

(For port selection) “eSDHC3 (eMMC4.4)”

(For the other SDx ports, there is no written of "(eMMXx.x)".)

Could show me the details of the description?

Should user use SD3 in the case of using eMMC4.4 device?

 

Thanks,

Miyamoto

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1 解答
827 次查看
Yuri
NXP Employee
NXP Employee

Hello,

  Basically there are no differences in uSDHC ports of i.MX6SX.

 

 From Table 2 (i.MX 6SoloX Modules List) of i.MX6SXDataSheet(s).

 

All four MMC/SD/SDIO controller IPs are identical and are based on the uSDHC IP.

 

They are:

 

Fully compliant with MMC command/response sets and Physical Layer as defined

in the Multimedia Card System Specification, v4.5/4.2/4.3/4.4/4.41/ including

high-capacity (size > 2 GB) cards HC MMC.

 

Fully compliant with SD command/response sets and Physical Layer as defined in the

SD Memory Card Specifications, v3.0 including high-capacity SDHC cards up to 32 GB.

 

Fully compliant with SDIO command/response sets and interrupt/read-wait mode as

defined in the SDIO Card Specification, Part E1, v3.0.

Conforms to the SD Host Controller StandardSpecification version 3.0.

 

All four ports support:

 

1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR104 mode (104 MB/s max)

1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both

SDR and DDR modes (104 MB/s max)

All ports can work with 1.8 V and 3.3 V cards. Each port is placed on a separate power domain.

It makes sense to follow NXP referenece design(s) if software compatibility with NXP BSPs  is needed.

Have a great day,
Yuri

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4 回复数
828 次查看
Yuri
NXP Employee
NXP Employee

Hello,

  Basically there are no differences in uSDHC ports of i.MX6SX.

 

 From Table 2 (i.MX 6SoloX Modules List) of i.MX6SXDataSheet(s).

 

All four MMC/SD/SDIO controller IPs are identical and are based on the uSDHC IP.

 

They are:

 

Fully compliant with MMC command/response sets and Physical Layer as defined

in the Multimedia Card System Specification, v4.5/4.2/4.3/4.4/4.41/ including

high-capacity (size > 2 GB) cards HC MMC.

 

Fully compliant with SD command/response sets and Physical Layer as defined in the

SD Memory Card Specifications, v3.0 including high-capacity SDHC cards up to 32 GB.

 

Fully compliant with SDIO command/response sets and interrupt/read-wait mode as

defined in the SDIO Card Specification, Part E1, v3.0.

Conforms to the SD Host Controller StandardSpecification version 3.0.

 

All four ports support:

 

1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR104 mode (104 MB/s max)

1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both

SDR and DDR modes (104 MB/s max)

All ports can work with 1.8 V and 3.3 V cards. Each port is placed on a separate power domain.

It makes sense to follow NXP referenece design(s) if software compatibility with NXP BSPs  is needed.

Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

827 次查看
SLICE
Contributor IV

Hello Yuri

Thanks for your kindly explanation.

But I still do not understand why NXP wrote it, ”(eMMC4.4)”, in “Port Select” in Table 5-6.

Best Regards,

Miyamoto

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827 次查看
Yuri
NXP Employee
NXP Employee

Looks like as misprint.

Regards,

Yuri.

827 次查看
SLICE
Contributor IV

Hello Yuri

Thanks! I will ignore it.

BR,

Miyamoto