Dear All,
We adjust the drive strengh for the memory address using CAADRDRVRDS in DDR_PHY_DRVDS_CON0 register.
However, the description in i.MX7 reference manual is only CA[9:0].
* Page 2346 in i.MX 7Dual Applications Processor Reference Manual, Rev. 0.1
Which register does the drive strengs for bits higher than CA[9] use?
Best Regards,
George
Hello,
bit field CAADRDRVRDS of DDR_PHY_DRVDS_CON0 controls all i.MX7 DRAM address
lines.
Have a great day,
Yuri
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