Problem with Flextimer's quadrature decoder mode on IMX7S

[jjamesson]

Hi, Community,

I am experiencing problems with using the Flextimer in the quadrature decoder more, as the counter stops incrementing as soon as I enable QUADEN in QDCTRL register. I am using the following initialization scheme:

// All registers using default values up to this point
FTM2_SC &= ~FTM_SC_CLKS_MASK;
FTM2_MODE |= FTM_MODE_FTMEN_MASK;
FTM2_MOD = 1000;
FTM2_CNTIN = 100;
FTM2_CNT = 0;
FTM2_SC |= FTM_SC_CLKS(1);
FTM2_QDCTRL |= FTM_QDCTRL_QUADEN_MASK;
while(1) {
   debug(("FTM2_CNT value: %5d\n\r", FTM2_CNT));
}

Notes:

1) The counter value will reach 113 and stop increasing due to enabling QUADEN.

2) I have initialized clocks for FTM2 (RDC = 37, ROOT = 111(0x3038b780), CCGR = 129(0x30384810))

3) I have initialized clocks for the PHA and PHB pins (SAI1 port, RDC = 106, ROOT = 74(0x3038a500), CCGR = 140(0x303848c0))

4) I am using ALT4 for MUX-ing both the PHA (SAI1_RXC) and PHB (SAI1_MCLK) pins

5) Regularly reading the PHA and PHB pins as GPIOs works correctly

6) I am aware that the IMX7S datasheet has incorrect bit numeration in the datasheet's FTM register parts, so I have used K64 datasheet's register numeration instead when declaring the bitmasks.

7) I have tried various ways of initialization orders without any results

I have validated with an oscilloscope that the encoder signals are valid

I have read the datasheet multiple times and have read all forum posts and documents there are on this topic, so I'm hoping that you can point out something that is wrong for me.

With regards,

[jjamesson]

Hi, Community,

I have managed to get the FTM running in quadrature decoder mode. It turns out I hadn't configured the IOMUXC_FLEXTIMER2_PHA_SELECT_INPUT and IOMUXC_FLEXTIMER2_PHB_SELECT_INPUT registers to select the pad involved in daisy chain. 

Furthermore, if anyone else gets stuck with this issue, I can confirm that the following initialization sequence works:

// All registers using default values up to this point
FTM2_MOD = 0x0000FFFF;
FTM2_CNT = 0;
FTM2_QDCTRL |= FTM_QDCTRL_QUADEN_MASK;
// Read number of decoded pulses with FTM2_CNT

It's as easy as that. I wish the datasheet would make it that clear. if you have any problems with this, it is likely that your clocks or IOMUX configuration, or input selection is invalid.

Thanks for thinking along, Igor!

[igorpadykov]

Hi James

reason may be initialization sequence, may be useful to look

at i.MX8QM SDK or Kinetis examples

FlexTimer for Quadrature Decoder on K66 - How to 

Quadrature Decoder not counting correctly on FRDM-K66F 

Best regards
igor
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[jjamesson]

Hi,

I have also tried using the input capture mode of the FTM module with the following initialization sequence with another pin connected to FLEXTIMER2_CH0:

FTM2_CNTIN = 10;
FTM2_MOD = 0x0000FFFF;

FTM2_CNT = 0;
FTM2_C0SC |= (FTM_CSC_ELSA_MASK | FTM_CSC_ELSB_MASK);
FTM2_SC |= FTM_SC_PS(3);
FTM2_SC |= FTM_SC_CLKS(1);

I am toggling the pin with a power supply between 0 and 3.3V. The results are similar: the CNT value keeps increasing, but the C0V value never gets stored, and the CH0F bit never gets pulled up. Does this again indicates that the pin actual voltage doesn't reach the FTM module?

With regards,

[igorpadykov]

Hi James

actually flex timer module was reused from IP Kinetis, please reread

sect.12.2.4.24 Quadrature Decoder mode, be aware of  "NOTE"

conditions, sect.12.2.4.24.1 Quadrature Decoder boundary conditions

i.MX 7Dual Applications Processor Reference Manual

Probably makes sense to test it on some miscellaneous kinetis boards

to check your hardware setup.

Best regards
igor

[jjamesson]

Hi, Igor,

Thank you for the references. The examples follow a very similar initialization sequence to what I have and I still didn't get expected results, so perhaps this is some other issue. I'm starting to think that this might be a clock initialization or routing issue.

Would you have any suggestions on how to debug this issue further? Since the timer is working in a normal state (QUADEN disabled), I know that the clock gets routed to the FTM module correctly, but Is there a way to validate that the clock gets actually routed to the PHA/PHB pins? If i MUX these pins to FTM2_PHA and FTM2_PHB, I can't read these pins as GPIO-s, because they are always 0 values.

With regards,