PCI Express PLL cannot lock on about 5% of all IMX7D CPUs - is there e10728 fix in BSP ?

[leonidsegal]

Hello,

I just found that there is a new errata on this issue:

e10728: PCIe: PLL may fail to lock under corner conditions

There is a suggested workaround.

The question is are you planning to add the suggested workaround solution into the future release?

            Thank you, Leonid.

[Yuri]

Hello,

It have been implemented into 4.1.15 or newer realse:

commit 697b13db90226aef04bb72407d1eb4a4bdedf54b
Author: Richard Zhu <hongxing.zhu@nxp.com>
Date:   Tue Dec 27 10:15:50 2016 +0800

    MLK-13679-2 PCI: imx: workaround of ERR010728 for pcie on imx7d

    Description: Initial VCO oscillation may fail under
    corner conditions such as cold temperature. It causes
    PCIe PLL fail to lock in initialization phase.

    Project Impact: iMX7 PCIe PLL fails to lock and iMX7D
    PCIe doesn't work.

    Workarounds: To toggle internal PLL_PD signal to make
    VCO oscillate after G_RST signal is de-asserted by
    following the sequences:
      - De-asserted G_RST signal
      - Toggle internal PLL_PD signal:
        - Write "0x04" to the address "0x306D_0054"
        - Write "0xA4" to the address "0x306D_0054"
        - Write "0x04" to the address "0x306D_0054"
      - De-asserted CMN_RST signal

Have a great day,
Yuri

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