No clock output on MIPI DSI IMX8MP

[isonthomas]

Hi,

I am using a custom board based on imx8mp-evk. I am facing some issues with enabling the MIPI_DSI. I am having the following configuration in device tree files

***imx8mp.dtsi***

aips4: bus@32c00000 {
compatible = "simple-bus";
reg = <0x32c00000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;

mipi_dsi: mipi_dsi@32e60000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mp-mipi-dsim";
reg = <0x32e60000 0x10000>;
clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
clock-names = "cfg", "pll-ref";
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
assigned-clock-rates = <12000000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&mipi_phy1_pd>;
blk-ctl = <&mediamix_blk_ctl>;
status = "disabled";

port@0 {
dsim_from_lcdif: endpoint {
remote-endpoint = <&lcdif_to_dsim>;
};
};
};

lcdif1: lcd-controller@32e80000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mp-lcdif1";
reg = <0x32e80000 0x10000>;
clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
clock-names = "pix", "disp-axi", "disp-apb";
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
<&clk IMX8MP_CLK_MEDIA_AXI>,
<&clk IMX8MP_CLK_MEDIA_APB>;
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>,
<&clk IMX8MP_SYS_PLL2_1000M>,
<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <0>, <500000000>, <200000000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
blk-ctl = <&mediamix_blk_ctl>;
power-domains = <&mediamix_pd>;
status = "disabled";

lcdif1_disp: port@0 {
reg = <0>;

lcdif_to_dsim: endpoint {
remote-endpoint = <&dsim_from_lcdif>;
};
};
};
.
.
.

*** custom board dts file*****

.

.

&lcdif1 {
status = "okay";
};

&mipi_dsi {
status = "okay";

port@1 {
mipi_dsi_out: endpoint {
remote-endpoint = <&dsi_lvds_bridge_in>;
attach-bridge;
};
};
};

.

.

The MIPI DSI is connected to SN65DSI83 LVDS bridge. It is also configured in the dts file for custom board

dsi_lvds_bridge: sn65dsi83@2d {
compatible = "ti,sn65dsi83";
reg = <0x2d>;
ti,dsi-lanes = <4>;
ti,lvds-format = <1>;
ti,lvds-bpp = <24>;
ti,width-mm = <217>;
ti,height-mm = <136>;
enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
interrupt-parent = <&gpio2>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";

display-timings {
lvds {
clock-frequency = <62500000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <6>;
hfront-porch = <5>;
vback-porch = <2>;
vfront-porch = <3>;
hsync-len = <2>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};

port {
dsi_lvds_bridge_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
};

With this configuration, I can see that the MIPI DSI and SN65DSI83 drivers are getting loaded to the system. I tried running a video using the following command:

gst-launch-1.0 videotestsrc ! waylandsink

I was not getting an output on the display and probed the MIPI DSI lines from iMX8. I am able to see activity on the data lanes but the clock lines are not showing any output.

The mipi dsi configuration used in the custom board dts is taken from the imx8mp evk dts file and I am able to get proper video in the evk.

What could be the reason that clock is not getting generated for the MIPI DSI? Any help would be much appreciated

[shaswath]

Hi @isonthomas ,

Were you able to find a solution. If yes could you please share?

Best regards,

Shaswath

[igorpadykov]

Hi Ison

for SN65DSI83 example one can look at boundary devices nitrogen8mp :

https://github.com/boundarydevices/linux-imx6/blob/boundary-imx_5.4.x_2.3.0/arch/arm64/boot/dts/free...

Best regards
igor