NVCC_ENET Sequecing at iMx8M Nano

[sergiospader]

Good Morning,

At IMx8M nano power sequencing, NVCC_ENET is one of the last supply to power up, after it just have the VDD_MIPI_1v2 and finally POR_B as figure attached.

My doubt is because, at my system, the NVCC_ENET power also the RGMII PHY (what look like make sense as both need the same power level ). As this voltage do not come from the PMIC system (it is independent) - similar to the ref designs

But, as this voltage is not provided from PMIC, the power sequence is not guarantee and using the PCA9450 PMIC is not possible to configure POR_B timing because the PCA9450 can't save initial config.

My question is to understand if the NVCC_ENET should really comply to this sequencing or it can be independent... Looking the reference designs 8MNANOD4-EVK and X-815LPD4-CPUCY-DF per example the NVCC_ENET comes from the base board as is really hard to believe that its sequencing is guaranteed at these boards.

Thanks

Sérgio

[igorpadykov]

Hi Sergio

NVCC_ENET is powered from VDD_1V8 on p.8 SPF-31407 Baseboard schematic,

produced by pmic on step 7.

https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-...

Best regards
igor

[sergiospader]

Hello,

Yes, It is a little bit confusing... because it has two 0Rs, one comming from ENET_VDDIO and other from VDD_1V8 as you mentioned....

But, at my case the NVCC_ENET is 2v5 ( I do not use AR8031) as my interface do not support 1v8 or 3v3.

which will be the solution for sequecing power as PMIC do not output 2v5 ?

I attached a picture showing an example of 2v5 usage, with mounting options of SPF-31407 sch.

Thanks for prompt answer!

[igorpadykov · Accepted solution]

Hi Sergio

if used 2v5 not produced by PMIC, it is necessary to design schematic solution

conforming power-up sequence described in datasheet. Probably with separate regulator

turned on with one of the voltages produced by pmic.

Best regards
igor