NTSC signal input in iMX6DP

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NTSC signal input in iMX6DP

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takashitakahash
Contributor III

Dear community.

Our customer has question about NTSC signal input in iMX6DP.

It has confirmed the NTSC signal input (BT656 interlaced) in iMX6DP.

When it should be 30 frames per second input at the input from IPU1 of CSI0, but only 15 frames are input phenomenon has occurred.

I tried various, the value of the CSI0_VSYNC_POL of IPU_CSI0_SENS_CONF register

set to 1 (IPP_IND_SENSB_VSYNC is inverted before applied to internal circuitry)

If, it is 30 frame input,

but set to 0 (IPP_IND_SENSB_VSYNC is not inverted before applied to internal circuitry)

In the case of  only 15 frames .

My understanding that for BT656 input is unrelated to CSI0_VSYNC_POL settings.

Also, in case of iMX6SoloDual have been entered in CSI1 from 30 frame even if set to "0".

I should be set to 1 ? Is it correct?

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weidong_sun
NXP TechSupport
NXP TechSupport

Hello Takashi,

     It seemed that there are some errors with customer's setting for BT.656 format, because CSI * _VSYNC_POL bit is not used when working on BT.656 mode.

     you should confirm with cusotmer if internal VSYNC bit was not set in register.

Best Regards,

Weidong

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weidong_sun
NXP TechSupport
NXP TechSupport

Hello Takashi,

     Yes, bit CSI0_VSYNC_POL of IPU_CSI0_SENS_CONF will not be used when BT.656 mode is set.

     The following information may be helpful for you :

(1) Height you set in register is greater than that of acctual image.

(2) The lines you skipped are too much.

Any one of above resons can cause the issue you encoutered, so check corresponding registers' configuration, please!

Best Regards,

Weidong

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takashitakahash
Contributor III

Dear Weidong-san,

Thank you for your replay.

I was confirmed to the customer.

Set in the register is through the size of the actual image.

If  enter from CSI0 with the same settings it had been captured at 30fps.

Also, skip the line (VSC) is 0.

Have you ever be other thought?

Thank you,

Best Regards.

T.Takahashi

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weidong_sun
NXP TechSupport
NXP TechSupport

Hello Takashi,

     It seemed that there are some errors with customer's setting for BT.656 format, because CSI * _VSYNC_POL bit is not used when working on BT.656 mode.

     you should confirm with cusotmer if internal VSYNC bit was not set in register.

Best Regards,

Weidong

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takashitakahash
Contributor III

Dear Weidong-san,

I'm sorry, previous comment is mistake.

If  enter from CSI0 with the same settings it had been captured at 30fps is mistake.

correct is,

If  enter from CSI1 with the same settings it had been captured at 30fps.

I tried even CSI1,

Here it has become 15pfs when set to 1 the value of the CSI0_VSYNC_POL.

A value set to 0 will be 30fps.

To summarize, now follows.

                                                 CSI0           CSI1

CSI * _VSYNC_POL = 0        15fps            30fps

CSI * _VSYNC_POL = 1         30fps            15fps

Would you please advice.

Thank you,

Best Regards.

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