Mscale ddr tool test fail with config file from i.MX config tool

[jiangyaqiang]

HI :

I got a problem with DDR test on imx8mm 4G lpddr.

When I use i.MX config tool do the stress test , the test pass, but it will failed with the config file lpddr4_config.ds generate by "i.MX config tool" when using in "Mscale ddr tool" . 

One more information:  when config the "setpoints" to 1, "Mscale ddr tool" will also pass the test.

it failed when config the "setpoints" to 3.

I attached the test result and config files for reference.

Any help will be appreciated .

Thanks.

[hongting_dong]

Hi @jiangyaqiang , @JorgeCas 

Please do this setting in ds file and capture whole log in MSCALE_DDR_Tool.exe

ddrparam set

TrainInfo

0x04

And I want to make sure one thing. You just replace from 2GB to 4GB on one same board OR make a new design for 4GB DRAM size.

Is there any error if run more test loop on Config Tool?

Best Regards

[jiangyaqiang]

HI  hongting_dong:

Thanks for help.

It just replace from 2GB to 4GB on one same board .

Run more test loop on Config Tool, there two difference result:

1. when I click "start" button , it will pass .

2. when chose  "Run forever" , it will fail at round two.

I attached the log for reference. 

[hongting_dong]

Hi @jiangyaqiang 

Generally speaking, 2GB replacement to 4GB is not required to change ODT, DRV.
But I remember you said you need to change these parameters to pass TRAINING?
Have you tried multiple boards? Will you meet same error?
Can you double check that the layout meets some limitation in HDG like Table 21. i.MX 8M Mini LPDDR4-3000 routing recommendations LPDDR4-3000, Table 22. LPDDR4 delay matching example (CA/CTL signals)
I see from the training log that the latency is rather long.
Is it possible to reduce DDR clock like 1GHz to test?

Best Regards

[jiangyaqiang]

Hi  Hongting_dong:

After more test, I found the the it will pass the test when using mscale_ddr_tool_v2.10 , it will fail at all other version of "Mscale ddr tool"(fail at 1500M, but pass at 1300M).

One more question: does the ddr test tool will change the arm/soc core voltage ? my board have no PMIC an the VDD_ARM VDD_SOC VDD_DRAM VDD_DRAM_PLL_0P8 are fixed to 0.9v.

[hongting_dong]

Hi @jiangyaqiang 

The version has been updated a lot and V2.1 passing doesn't mean anything.
With your testing, I suspect there is a issue in the signal quality.
Please try a signal integrity test, note the results of the tDIVW Margin and vDIVW Margin tests, they will show the eye diagram , which can detect if the signal is good enough during reads and writes.
Since you didn't do the PISI emulation test, the modification about the ODT DRV VREF will be a bit complicated.
I suggest you try this modification, ATxImpedance, TxImpedance, MR11.CAODT, MR11.DQODT, MR12, MR14, related to write, try to modify to find the right value.
ODTImpedance, MR3.PDDS, PhyVref related to read, try to modify to find the right value

Best Regards

[jiangyaqiang]

HI Hongting_dong:

Sorry, but how to do DDR "signal integrity test" ? 

Best Regards.

[JorgeCas]

Hello,

You could use specialized equipment to measure the signal integrity. Also, you could use vTSA for reference in Config Tools for i.MX to determine margins of DDR .

Best regards.

[JorgeCas]

Hello,

Yes, the script has a PMIC initialization in the beginning of the DDR script, if you are using EVK's PMIC or DC/DC power supply for DDR part, there is no need to define it in the script.

Best regards.

[jiangyaqiang]

Hi hongting_dong:

I have tested two board , result it the same.

We have double check the layout, it meets the requirement.

And I tried 1066M , it passed the test.

[JorgeCas]

Hello,

Let me check if I understood correctly.

You passes DDR stress test with i.MX Config Tools for i.MX. Then, you loaded the .ds file generated in i.MX Config Tools for i.MX as the DDR script in MSCALE_DDR_Tool (causing the test fail), right?

Best regards.

[jiangyaqiang]

HI JorgeCas:

   Yes , you are correct.