MX RT1024 FlexSPI external SRAM is66WVS1M8ALL problem

[rexrothppc]

//Day 1
In our new board we connect external is66WVS1M8ALL sram to the FlexSPI port on the channel A.
And I think - this is wrong connection, because it is not worked!
Used pins are (I think they wrong, but for question I describe them):
FLEXSPI_A_SS0_B: GPIO_SD_B1_11(19) - I think its is bind to internal flash, so we desolder from sram chip

FLEXSPI_A_SS1_B: GPIO_SD_B1_01(32) - I connect to sram chip select
FLEXSPI_A_DATA0: GPIO_SD_B1_08(23)
FLEXSPI_A_DATA1: GPIO_SD_B1_10(21)
FLEXSPI_A_DATA2: GPIO_SD_B1_09(22)
FLEXSPI_A_DATA3: GPIO_SD_B1_06(25)
FLEXSPI_A_SCLK : GPIO_SD_B1_07(24)
FLEXSPI_A_DQS : GPIO_SD_B1_05(26) - it is float(as I understand this is for 133Mhz usage possibility)

In my demo project I used modified flex_nor_poling_transfer example,
I set FlexSpi frequency to 12.5mHz(for logic analyzer) and try to read ChipId
from internal build in 4Mb flash and our external (out of cpu SRAM) chip.
I saw that chip Id for 4Mb flash read stable and relieble but chip Id for SRAM
not read correclty, just zerros...But...in my logic analizer I saw correct response
from SRAM chip, and chip select pins changing correctly while select correspond adress space. FlexSpi LUT command I use for 1PAD mode.

My question is - Is it possible to use external sram inFlexSPI port but in channel B for our External SRAM memory.
Should I have to prepare memory region in the MPU, for using this memory for code executon!

We confused with pins wich describes for boot mode and XIP!
What that meen in the document AN12878, page 3 "RT1024 has only one FlexSPI port and is used for internal flash. RT1024 doesn’t support external FlexSPI flash, please useinternal SIP flash instead".
- We cant use external sram for FlexSPI?

//Day 2
Yesterday we have soldered our SRAM chip to the FlexSpi channel B and rezult negative.
Chip select does not switched, read answer from Sram is zerroes.

I saw interest thing, if I asighn pins for FlesSpi channelA - board debug broke, if I leave pins for FlexSpi channel A not initialized - all works,
but when I decide to use pins for channel B - i do not see any signals, than I make initializing pins for channel B, and I saw correct signals.
If I try to use channel B, CS for kFLEXSPI_PortB2(47)does not switching, but for kFLEXSPI_PortA2 - CS work OK

...any Ideas?

[rexrothppc]

Hi, EdwinHz , I want ask you a qustion. Could you offer some other chip with the same price as MX RT1024 with support external FlexSpi Quad RAM. As I understand, It should have 2 FlexSpis, but anyway I want to get from you answer about core wich better fit such requerenments as 4Mbyte flash and 1Mbyte ram with price like RT1024, may be it present, I am just do not know about that...

[rexrothppc]

Hi, yesterday in the evening, I decide to check code for stm32f746 - and vualya...Stm32 Cortex-M7 have posibilyties that I nead, and so hard taking from RT1024. On the demo projects present 2 examples. One example shows how to run code(blinking finction) from external quadspi flash and another demo shows how to stretch memory by quadspi ram and use it like char* data = 0x90000000. So, we have 8000 RT1024 chips in our stock, so, there are  nothing left to do, just ask NXP company prepare adequat example for using FlexSpi in configuration that was describad above.

[EdwinHz]

Hi @rexrothppc,

I'm sorry for the inconveniences you are experiencing. I will pass on the recommendations to the SDK team so they can create more examples for the FlexSPI on our RT devices. Thank you for your recommendations.

BR,
Edwin.

[rexrothppc]

Thank you, I hope I am together with NXP engineers make window of RT1024 possibility wider and we do not try to find other controllers that fit our requirements.

This is our products: https://tiras.technology/product-category/wired-security-systems/#wired-scps

[rexrothppc]

Hi, problem is not in chip select, are in something else. Chip select for flexspi channel A (A1, A2) works ok and my sram gave an answer. One chip select switch when I read internal flash on address 0x60000000, another - when I read chipId my external sram by address 0x60400000, but I do not receive it in program. The problem is, may be in AHB bus configuration? So i receive correct chipId answer 0xef for build int flesh, but not receive an answer for external sram which I see in logic analizer. The command to external sram from flexspi goes correct and external sram chip gave an answer correct too, but it not passed throw RT1024 internal bus and in my program I can see answer from internal flash but not for external sram

Functions:

status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId);

and something like

int n;

int *data = (int *)0x60400000;

n = *data;

-- does not forked for external sram, but works for internal flesh.

[EdwinHz]

Hi @rexrothppc,

Thanks for the clarification. I believe I made an oversight from the beginning. You should not be basing your application from the flexspi_nor_poling_transfer example, as this example is designed to operate an external NOR Flash. Instead, you should be using the "evkmimxrt1024_semc" example code, which (as described on its own readme file) "shows how to use SEMC controller driver to initialize the external SDRAM chip". This is why you are seeing that your function calls are working for the internal flash, but not the external SRAM.

[rexrothppc]

No. I think you you're taking me in the other direction. The service command from W25Q32JV and is66WVS1M8ALL are almost the same. The working frequesis are almost same. The difference between this is two chips is just the name. So I can believe that I can use is66WVS1M8ALL as flash, with unlimited cheap erease cycles is single mode.

Nxp have prepared very nice documentation about yours FlexSpi whith images where I can use FleshSpi in paralel or single mode. But on the practise I saw that it does not fit...This is just soap bubble. When I read documentation about posibility of the FlexSpi my eyes started fire. I can significantly improve forces of my device less then 1 dollar...but not at this time You have AN12239SW wheare I can sea how I can youse external ram throw FexSpi and no difference about quad ot octal mode - it is the same, the difference is that program code should be put to the ITC ram while I use the external sram. So my question leves open. I chacked SEMC - I see clasic paralel sdram interface and it is not interest for me. Ask my question to the engenear department, and I think thay have to give more detailed answear about usage FlexSpi. And answer like - We can give an example code just for our demoboards - not fit,So why you spent so much time and paper for describing posibility of FlexSpi intarface, and I have to read that?

[EdwinHz]

Hi @rexrothppc,

The RT1024 is able to support 4bit SRAM, the note you mention only refers to FlexSPI flash.

Please take a look into this post, where I shared an answer to another user regarding the use of chip selects, as well as this other community post about how to set up an external SDRAM on the RT1024. The second community post is using uTasker, but the DCD configuration is useful regardless.

Let me know if this helps, and you have further inquires about this topic.

BR,
Edwin.

[rexrothppc]

This is wrong reply, wrong answer!