MCIMX8QXP-CPU

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MCIMX8QXP-CPU

740 次查看
NereaB
Contributor I

Hello All,

I would like to know which class of PCB is the board of the MCIMX8QXP-CPU kit. I cannot find a table where I can make a direct  link between the minimum line width and the PCB class. I know that higher the class, thinner the lines. I saw that the majority of the lines on the PCB are 0.1mm width with some lines with 0.06mm widht. Can you help me?

Thanks in advance,

Nerea

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720 次查看
NereaB
Contributor I

Thanks! Do you know which is the minimum line width used in the design?

Thanks in advance,

Nerea

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riteshmpatel
NXP TechSupport
NXP TechSupport

Hi @NereaB,

Kindly refer to the impedance table (Fab layer) in the EVK PCB layout.

As per the Impedance table, the minimum trace width used is 3.5 mils for routing 100R differential signals.

Thanks & Regards,
Ritesh M Patel

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710 次查看
NereaB
Contributor I

Thanks @riteshmpatel ,

Is there any other trace which is smaller but it is not on the impedance table?

 

 

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riteshmpatel
NXP TechSupport
NXP TechSupport

Hi @NereaB,

Due to the design constraints, very few signals are routed with 2.5 mils in the layout and this is the minimum trace width used in the design.

Thanks & Regards,
Ritesh M Patel

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riteshmpatel
NXP TechSupport
NXP TechSupport

Hi @NereaB,

I hope you are doing well.
Please accept my apologies for the delay in response.

MCIMX8QXP-CPU MEK kit has been fabricated as per the PCB IPC class IPC-A-600.

Thanks & Regards,
Ritesh M Patel

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