In which register can I configure GPU3D_SHADER_CLK_ROOT of i.mx6 DL ?

[roelofberg]

Hi,

where can I configure GPU3D_SHADER_CLK_ROOT of i.mx6 DL ?

It is introduced in the Processor Reference Manual:

"

There are two main clocks for the processing control: shader clk for the shader part, and core clk for the remaining part. The core clk and shader clk frequency are programmable in CCM (as the clk frequency for GPU3D_CORE_CLK_ROOT, GPU3D_SHADER_CLK_ROOT).

"

In CCM_CBCMR one can configure gpu3d_core_clk_sel and gpu2d_core_clk_sel. I assume that gpu3d_core_clk_sel controls GPU3D_CORE_CLK_ROOT, right ? But I haven't found a proper register for GPU3D_SHADER_CLK_ROOT at all ?

Thanks,

Roelof

[AnsonHuang · Accepted solution]

Hi, Roelof

     You can see below code comment on arch/arm/mach-imx/clk-imx6q.c, I think gpu3d shader clk setting located in CCM_CBCMR bit[9:8].

689                 /*

690                  * The multiplexer and divider of imx6q clock gpu3d_shader get

691                  * redefined/reused as gpu2d_core_sel and gpu2d_core_podf on imx6dl.

692                  */

[roelofberg]

Thanks a lot Yongcai. I assume you refer to the Linux code, we're using VxWorks here. It always makes sense to look for Freescale's Linux implementation, right ? I really appreciate that Freescale puts so much effort in good Linux drivers and I hope, one day we can benefit from that too :smileywink:

Thanks for the excellent support, as always.

Freescale rocks !