We are bringing up a board and are using a Microchip DSC557 PCIe Clock generator, similar to the MCIMX8QM-CPU MEK Platform reference design. With this generator, we are using a 22 ohm series resistor and 49.9 ohm pull downs and the clock output looks good, pictures attached.
Unfortunately the PCIe PLL fails to sync to the external clock causing the kernel to hang.
Looking for advice on how to proceed.
Thank you.
Can you analysis the pcie status registers(TYPE1_STATUS_COMMAND_REG,CON_STATUS_REG,etc....) using memtool under /unit_tests/ and also attach related log?