In I.MX25RM page 143, it is as below:
The boot ROM code makes use of the duplicate boot code according to the following procedure:
• On device power-on, the boot ROM copies the first 4 Kbytes of boot code from the NAND Flash
to the NFC buffer.
• ECC checks the first 4 Kbytes of boot data from NAND Flash Block-0
— If no ECC errors are detected, the downloaded 4 Kbytes image as well as rest of the image is
copied to application destination pointer location (specified in the HAB header) and secure
boot is performed. The application image length is specified in the image header so the boot
ROM reads this to know how much image data to download.
— If ECC Error is detected in first 4 Kbytes of boot data from Block-0, the boot ROM code copies
the duplicated 4k boot data from the NAND flash block-1.
……
In page 153, it says as below:
NFC automatically generates an ECC code for both main and spare data during NFC data load/read
to/from NAND Flash, and NFC updates ECC in the ECC status Register. NFC performs error detection
and error correction. If the number of ECC errors does not exceed the allowable limit (four for 4-bit ECC,
eight for 8-bit ECC), then NFC corrects those errors.
……
Then, I have a question:
1, Do NFC perform the error correction when ECC checks the first 4 Kbytes of boot data from NAND Flash Block-0?
2, If it detect some ECC errors, but the errors' number does not exceed the allowable limit and NFC corrects those errors, which below procedure will follow?
— If no ECC errors are detected, the downloaded 4 Kbytes image as well as rest of the image is copied to application destination pointer location (specified in the HAB header) and secure boot is performed. The application image length is specified in the image header so the boot ROM reads this to know how much image data to download.
— If ECC Error is detected in first 4 Kbytes of boot data from Block-0, the boot ROM code copies the duplicated 4k boot data from the NAND flash block-1.
Hi 王剑翰
1. yes, NFC performs the error correction when reading the first 4 Kbytes of boot data from NAND Flash Block-0
2. If it detects some ECC errors, but errors' number does not exceed the allowable limit, NFC corrects those errors
and follow boot flow described in RM (as in case when no errors were detected).
Best regards
igor
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Thank you for your kindly reply.
My customer also have a question for this (The MPU is i.MX 257 and the nandflash is MT29F2G08ABBEAH4):
They modified the ATK source code so that all the spare area of block0 were writed with 0 during programming operation. They hope it can cheat iMX257 that the Block0 of NAND has been borken, and make it boot from block1. But it failed, the board also boot from block0.
So, they want to ask what else ROM code should be changed specially?
I think you can check signals by oscilloscope and
you will find that iROM after fail with block0, will
access to block1, check nand address signals.
For most confidence you can erase entirely block0.