How to enable MIPI-DSI on iMx8DualX QNX platform ?

[Richard__Wang]

I have requirement to setting/configure MIPI-DSI on QNX.
1. Hardware diagram and some background, our product include two parts:
1) One part is the display which is an independent panel with deserializer(MAX96752F) + LCD Panel + mcu
2) Another part is the mainboard which include i.MX8 + serializer(MAX96789)

2. Mainboard and the display connect via GMSL2 to transmit data, communication via I2C to do cmd and some serdes configuration.

3. The mainboard need support two channel MIPI-DSI video signal output.

4. Now, mainboard can communicate with display via I2C, but it can not send video stream of MIPI-DSI to the display because of that mainboard was not supported the driver of MIPI-DSI to MAX96789.

5. So now we need help to support MIPI-DSI drivers on the i.MX8Dual platform.

I had tried to modified file "graphics.conf" and "wfdcfg.c" below:

(1) graphics.conf：

(2) wfdcfg.c：

But it was not worked on the expected rate.

I'm not sure if I need to write the driver for RM67191.

[Richard__Wang]

Hello experts,

    I have config the graphics.conf again, the new modified show below:

# WFD port 1 - DPU0/MIPI0/LVDS0
  wfd-port-dpu0-mipi0 = mipi
  wfd-port-dpu0-mipi0-wide-display = false
# WFD port 2 - DPU0/MIPI1/LVDS1
  wfd-port-dpu0-mipi1 = mipi
  wfd-port-dpu0-mipi1-wide-display = false
# WFD port 3 - LCDIF
  wfd-port-lcdif = disabled
 
    And I remeasure the waveform of the CLK and DATA gpio of the serializer MAX96789, show as below:
(1) The CLK pin waveform:

As you can see, the frequency is 276MHz, meet my expected value.

(2) Data of High-frequency pin:

It is only 44KHz, the frequency is far below our expected value. Theoretically, the frequency of the MIPI-DSI high-frequency output pin should be consistent with the CLK frequency, so it should also be over 276 megahertz.

[Richard__Wang]

I have some doubts that whether I need the library: "libwfdcfg-imx8qxp-dsi-oled.so". Because the library required information in graphics show below is:

 "

...

...

 begin wfd device 1

   # Choose ONE wfd-dlls line that matches your hardware.

   # iMX8QXP CPU board - HDMI display using IT6263 converter chips

   # wfd-dlls = libwfdcfg-imx8qxp-hdmi-it6263.so libWFDimx8dpu.so

    wfd-dlls = libwfdcfg-imx8qxp-bitech.so libWFDimx8dpu.so

   # iMX8QXP CPU board - HDMI display using IT6263 converter chips and parallel RGB display

   # wfd-dlls = libwfdcfg-imx8qxp-it6263-parallel-LCD.so libWFDimx8dpu.so

   # iMX8QXP CPU board - HDMI display using ADV7535 MIPI-2-HDMI converter board

   # wfd-dlls = libwfdcfg-imx8qxp-adv7535.so libWFDimx8dpu.so

   # iMX8QXP CPU board - IMX-DSI-OLED1 panel with mipi-dsi interface and RM67191 driver

   # wfd-dlls = libwfdcfg-imx8qxp-dsi-oled.so libWFDimx8dpu.so

...

...

"

As you can see, if I want to develop with the mipi-dsi interface, I have to have access to the dynamic library: libwfdcfg-imx8qxp-dsi-oled.so. Right ?

Besides, based on the response information from the waveform above, I am not sure if I only enabled the low-speed function of MIPI-DSI and did not enable the high-speed function. If so, please help me and tell me how to enable the high-speed function of MIPI-DSI in the wfdcfg of I.Mx8 BSP.

[Bio_TICFSL]

Hello,

Yes, you need to uncomment the line which includes the correct library ( # wfd-dlls = libwfdcfg-imx8qxp-dsi-oled.so libWFDimx8dpu.so) and comment out others.

Do you have the binary? If not, It could be in installed QNX SDP in similar path:

~/qnx700/target/qnx7/aarch64le/usr/lib/graphics/iMX8.../

Let me know whether you can see the binary. Meanwhile I will check with developer whether there are needed some other steps.

Regards

[Bio_TICFSL]

Hello,

I was wrong on previous post. To enable MIPI-DSI, you need to do the following changes in graphics.conf:

begin wfd device 1
# Choose ONE wfd-dlls line that matches your hardware.

# iMX8QXP CPU board - HDMI display using IT6263 converter chips
# wfd-dlls = libwfdcfg-imx8qxp-hdmi-it6263.so libWFDimx8dpu.s
# iMX8QXP CPU board - HDMI display using IT6263 converter chips and parallel RGB display
# wfd-dlls = libwfdcfg-imx8qxp-it6263-parallel-LCD.so libWFDimx8dpu.so
# iMX8QXP CPU board - HDMI display using ADV7535 MIPI-2-HDMI converter board
wfd-dlls = libwfdcfg-imx8qxp-adv7535.so libWFDimx8dpu.so
# iMX8QXP CPU board - IMX-DSI-OLED1 panel with mipi-dsi interface and RM67191 driver
# wfd-dlls = libwfdcfg-imx8qxp-dsi-oled.so libWFDimx8dpu.so

....

# WFD port 1 - DPU0/MIPI0/LVDS0
wfd-port-dpu0-mipi0 = mipi
wfd-port-dpu0-mipi0-wide-display = false
# WFD port 2 - DPU0/MIPI1/LVDS1
wfd-port-dpu0-mipi1 = mipi
wfd-port-dpu0-mipi1-wide-display = false
# WFD port 3 - LCDIF
wfd-port-lcdif = disabled

As convertor ADV7535 is connected to MPI-DSI output. Then, the binary can be found in QNX SDP here:

../qnx700/target/qnx7/aarch64le/usr/lib/graphics/iMX8.../libwfdcfg-imx8qxp-adv7535.so

Can you please check to use this enable?

Regards

[Richard__Wang]

Hello, 

    Thanks for your reply.

    I did the changes you suggested, I found the libwfdcfg-imx8qxp-adv7535.so in QNX SDP, then I build this binary into the image and load it into the board.

    After completing the preliminary preparation work, I re-measured the data and clock pins and found that the clock frequency was slightly higher than when libwfdcfg-imx8qxp-adv7535.so was not used before (previously 275MHz, now 297MHz), as shown in the following figure:

(1) Clock-Frequency Figure:

The frequency measured by the data pin is 25MHz for high speed and 45KHz for low speed, as shown in the following figure:

(2) High-Speed-Frequency Figure:

(3) Low-Speed-Frequency Figure:

(4) (High & Low)Mixed-Frequency Figure:

Due to unclear theoretical waveform and frequency of MIPI-DSI, I am not sure whether my current implementation is correct or not. Could you please check the wareform above ? Is it wareform of MIPI-DSI signal ?

Thanks a lot.

[Richard__Wang]

Hello,

It is a great honor to receive your reply.

Sorry, I don't have the dsi binary, so could you please send me a similarly binary which can drive MIPI-DSI signal on the i.Mx8 QNX platform ? Thanks a lot.

[Bio_TICFSL]

Hello,

your measured 25MHz seems it is too low. It would mean 4.16 pixel clock, which is not standard resolution (is it 640x480?).

To tell how should look correct frequency, could you please share what resolution are you setting?

In your case, it might help to define parameter the following parameters in file

imx8x-adv7535.c:

static const struct wfdcfg_keyval video_extensions[] = {
    { .key = TIMING_DSI_HBLANKING_MODE, .i = TIMING_DSI_HBLANKING_MODE_AUTO_BYTES, },
    { .key = NULL },
};

Do you have access to the mentioned file and could you compile it?

I have attached pictures from developers for your reference to see how the defines change the behavior. The third image (BTA) shows communication in low speed mode.

Regards