How to disable the GPIO pulse level generated during the U-Boot booting phase?

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How to disable the GPIO pulse level generated during the U-Boot booting phase?

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xueyf
Contributor III

Hello NXP:

    I am using the IMX8MP platform, and during the power-on process in the U-Boot booting phase, the following four GPIOs exhibit a pulse waveform with a width of approximately 300ms. I have tried many methods but have been unable to eliminate it. I do not want any pulse waveform to appear on these four GPIOs during the power-on startup. How can I resolve this issue?

 

xueyf_0-1702454223523.png

xueyf_2-1702454288033.png

 

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JorgeCas
NXP TechSupport
NXP TechSupport

Hello, I hope you are doing well,

Could you please share me what is connected to those pins?

What did you try to solve this issue?

Are you using those pins as HDMI functions?

Best regards.

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xueyf
Contributor III

Hi JorgeCas

    Here is the schematic diagram for these pins, only intended for regular GPIO use.

gpio.png

During the U-Boot stage, I disabled HDMI, I2C, and CAN functionalities associated with this pin in the device tree. However, these four pins still generate a high pulse, as if this pulse was generated during the SPL stage.

I attempted to disable some I2C and GPIO-related functionalities in the defconfig file, but it seems to have no effect. I also tried to disable the GPIO through registers in the board_f.c file, but it appears that the pulse is generated even earlier in time.

 

 

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JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

You may set the state of such GPIOs at SPL for an early setup:

spl.c

Same as above, since ROM code won't initiate anything, it will be SPL which will set early configuration and U-boot device tree should be changed as well to maintain low state on GPIOs.

Best regards.

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xueyf
Contributor III

Can you provide more details on how to modify the SPL?

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JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

You could try to modify SPL and build U-boot on standalone as is described on next post.

Best regards.

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