How should I understand the IOMUX?

[yan_ding]

Hi,

I am new in embedded hardware, currently working with i.mx 7 (MCIMX7U5DVK07SC). After reading the "i.MX 7ULP Applications Processor Reference Manual" and the EVK, I am still confused on the IOMUX function. So far, my understanding is that PTA~PTF ports are function limited GPIOs. The developers need to define the port group (A to F) among Alternative 0 ~ 14.

However, when I look at ALT1: PTA0 is PTA0 ... PTF19 is PTF19. Is this means they can be any low speed bus? I can get 30 I2C bus if necessary? I can get 20 SPI bus if I need? Understand they belongs to different Core.

I am working on PCB layout. Due to the board size and siganl layer count reason, I wish to understand the iomux to see how flexible I can define each pin. So that the traces won't be tangled and makes the layout easier.

Thanks,

Yan

[gusarambula · Accepted solution]

Hello Yan Ding,

There is an explanation of the 6 available RGPIO2P ports (A-F) on Chapter 40 of the i.MX7ULP Reference Manual, which I understand you have already reviewed. These are designed for general Input Output purposes, but you would need to manage them through software.

There are SPI and I2C modules that work on hardware so it could be easier to use them before trying to setup these protocols trough software.

If you haven’t, I would recommend trying the i.MX Pins Tool for i.MX, which may help on configuring your muxing options.

https://www.nxp.com/design/designs/pins-tool-for-i.mx-application-processors:PINS-TOOL-IMX

I hope this helps!
Regards,

[yan_ding]

Thank you gusarambula.