Hi there,
In U-boot of imx.51 I understand the start position of SD card booting is 0x400, and there's a command for cpu to jump to _start. However, all DCD entries reside between 0x400 and _start. So how does cpu come back and read these DCD entries to complete DDR controller configuration? Thanks.
Hi eddie
iROM automatically seeks DCD data, based on boot settings,
boot flow similar to sect.7.6.2 Device Configuration Data (DCD) IMX53RM
Best regards
igor
The boot ROM of the i.MX51 copies the whole block (2K / 4K) to internal memory
in order to analyze it. Please refer to Figure 1 (Secure Boot Flow from Device)
of the app note AN4547 (Secure Boot on i.MX25, i.MX35, and i.MX51
using HABv3)
http://cache.freescale.com/files/32bit/doc/app_note/AN4547.pdf
Have a great day,
Yuri
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Appreciate that. I did this study for a while and I was assuming the memory controller will be set in lowlevel_init.S. Does it mean memory controller configurations are done before _reset? It looks dcd are done in the very first beginning!