Do you have a sample code to use DDR3L on MCIMX6DL-SDP with 1.35V?

satoshishimoda · ‎03-06-2014

Hi community,

I have a question about MCIMX6DL-SDP.

On MCIMX6DL-SDP, DDR3L chips are used as DDR3 (1.5V), isn't it?

I want to use them as DDR3L (1.35V).

Then, I looked for a sample code to change the MMPF0100 output voltage for DDR from 1.5V to 1.35V, but I could not find it.

Do you have any sample code to use the memory as DDR3L (1.35V)?

Best Regards,

Satoshi Shimoda

Yuri · ‎03-11-2014

The PF0100 PMIC supports programmable output voltages via I2C control.

On i.MX6 SDB/P design DRAM voltage DDR_1V5 is powered via PF0100 SW3 A/B

channel in Dual Phase configuration. Please look at section 6.4.4.5 (SW3A/B) of

the PMIC Datasheet for more details.

Table 65 (SW3A/B Output Voltage Configuration) shows the output voltage coding.

Table 66 (SW3AB Register Summary) provides a list of registers used to configure and

operate SW3A/B. A detailed description on each of these register is provided on Tables 67

through Table 76.

Please apply to Chapter 30 “Inter-IC (I2C) Driver” of “i.MX_6Dual6Quad_Linux_Reference_Manual.pdf”

about Linux I2C driver.

Of course, for assurance, all DRAM voltage settings and following DRAM initialization

should be implemented by codes, running in internal i.MX6 memory. Alas, we do not have

an example for it, at least, right now.