Running now my custom IMX^ULL board with attached lcd display. Compared to the imx6 EVK I had to re-configure some of the I/O pin configuration. Plus I removed some obsolete functionality from the DTS configuration.
One thing I cannot warp my had around is how to properly set the LCD RESET pin.
Opted for using GPIO_3_4 on this board and editing the imx6ull-14x14-evk.dts file. Especially the pinctrl_lcdif_reset: lcdifresetgrp group is giving me some headache: I tried to setup the following:
pinctrl_lcdif_reset: lcdifresetgrp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x79 !!if enabled lcd NOT working
>;
};
or
pinctrl_lcdif_reset: lcdifresetgrp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79 !!if enabled lcd NOT working
>;
};
In both cases the GPU is not started with that configuration. I see the following error message in the syslog:
imx6ul-pinctrl 2290000.iomuxc-snvs: failed to get pin(69) name
pinconfig core: failed to register map default (1): no group/pin given
mxsfb: probe of 21c8000.lcdif failed with error -22
As a result the lcd display is not updated.
If I remove the lcdif reset group, the display works fine though
Any clues on how to spec GPIO3_4 for the lcdif reset group?
Mat
Igor,
Interesting point, maybe reset is not used/needed with the kernel.
But interestingly if one looks at the 'original' sample that is provided for the IMX6ul and IMX6ull evk board, it instruments the following. Here the original unmodified sample from imx6ull-14x14-evk.dts:
pinctrl_lcdif_reset: lcdifresetgrp {
fsl,pins = <
/* used for lcd reset */
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
>;
};&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl
&pinctrl_lcdif_reset>;
display = <&display0>;
status = "okay";display0: display@0 {
bits-per-pixel = <16>;
bus-width = <24>;display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <9200000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <8>;
hback-porch = <4>;
hsync-len = <41>;
vback-porch = <2>;
vfront-porch = <4>;
vsync-len = <10>;hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
Maybe the documentation is not up to snuff?
PS:
if I build the kernel with the above I/O pin, it builds just fine and I do not get any error message.
It almost seems like when the line starts with "MX6UL_PAD_LCD_RESET__" I get an error.
Mat
Finally came to conclude what is wrong: The IMX6ULL DTS 'pinctrl_lcdif_reset: lcdifresetgrp' sample is not supported by the 4.9.11 kernel. I finally changed the DTS configuration and added the reset definition to the 'lcd control group' instead:
pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79>;
};
If you rather want the pin being pulled up at kernel start, change to the following line:
MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x79
PS: See as well IMX6UL sample imx6ul-14x14-evk.dts
Mat
Hi Mat
eLCDIF driver is described in Chapter 12 ELCDIF Frame Buffer Driver
attached Linux Manual and according to its sources there is no option for
reset with dts. It is documented in Linux/Documentation/devicetree/bindings/fb/mxsfb.txt
Reset is performed in uboot/board/../mx6ullevk/mx6ullevk.c file
function do_enable_parallel_lcd().
Best regards
igor
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