Hi,
i'm accessing a chip on the WEIM external bus, it is an asyncoronous access red and write of course.
Due to a problem on that chip in some situation the wait signal (DTACK) stay asserted for a long time, after 1024 AHBCLK cycle I should have a data_abort exception on the ARM, but sometimes instead to have such exception i have a prefetch abort exception....
Any idea?
it seems to be random... when i have the long wait i can have both exception....
Thanks
If image(.text section) included in the WEIM(ie. the pc(R15) will access the WEIM) and the WEIM external bus is not stable, the prefetch abort is expected.