Hello 93 community!
I'm sorting things out and looking thru the docs, but title says it all... Can the M33 clear faults on the Linux A55's and act as a watchdog or reset supervisor? What relevant sections of the docs can I hit to learn more about this behavior?
- Is it possible to trigger a HW reset on the cores?
- Are there security measures that prevent this by default?
- What peripherals are involved?
I'd love to hear from anyone that has used the real time core in this way... your time is very much appreciated!
Hi @ajacks504d3
For scenarios where the M33 and A55 are running at the same time, the M33's clock is dependent on the A55 for generation, and once the A55 is reset, the M33 will also be reset. There is no hw reset signal between M core and A core. You can realize it with specific hardware design, but M core will also reset.