Can I burn eFuses for iMX8M Mini family using direct register access via JTAG?

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Can I burn eFuses for iMX8M Mini family using direct register access via JTAG?

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s_k
Contributor II

Hello,

I have a similar question as in https://community.nxp.com/thread/499677 .

 

We have programmed some of the eFuses (a.o. Boot cfg., MAC addresses) of various iMX6 devices with direct OCOTP_CTRL register access via JTAG.

 

For a new project we should do the same for iMX8M Mini/Nano devices.

Based on the On-Chip OTP Controller section in the i.MX 8M Mini Applications Processor Reference Manual, Rev. 2, 08/2019 the programming of the Fuses looks the same as on the iMX6.

 

However, the article on this site (https://imxdev.gitlab.io/tutorial/Burning_eFuses_on_i.MX8_and_i.MX8x_families/)

claims, only SECO and SCU can access eFuses (using sc_misc_otp_fuse_read() and sc_misc_otp_fuse_write()).

 

The i.MX8M Mini RM does not mention anything about SECO and SCU.

 

Thus, I’m wondering if the SCFW API calls are only needed on iMX8 members having AHAB and a specific SCU.

Could you check if the eFuses of iMX8M Mini can be accessed via JTAG register reads/writes to OCOTP_CTRL registers?

 

Thanks.

Stefan

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3,690 Views
igorpadykov
NXP Employee
NXP Employee

Hi Stefan

you are right, for processors without scu like i.MX8M Mini fuses can

be programmed with jtag.

Best regards
igor
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3,690 Views
s_k
Contributor II

Hi Igor,

Your answer was very helpful, thanks.

Finally I have an adapter for JTAG programming of the iMX8M Mini.

Based on the SJC section of the reference manual the JTAG chain is the same as on the iMX6 (MOD = 0):
TDI -->  SJC(IR=5) --> SDMA (IR=4) --> DAP_A53 (IR=4) --> DAP_M4 (IR=4) --> TDO.

However, when I try to read the IDs of the Cortex A and SJC, I only can read 0x5BA00477.

It seems the chain setup is different.

Would you give me some hints on how I can access the Cortex-A-IR please?

Thanks, and best regards,

Stefan

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igorpadykov
NXP Employee
NXP Employee

Hi Stefan

one can try as in

Debugging the i.MX 8M SOM Using ARM DS-5 

Best regards
igor

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s_k
Contributor II

Hi Igor,

Thank you, but I don't have the ARM DS-5 toolchain, unfortunately.
And Segger points back to you ([SOLVED] i.MX8M support - J-Link/Flasher related - SEGGER - Forum ).

The only thing I need to know, how to activate the Cortex-A53 in the JTAG chain to get access to the OC_OTP control registers.

Any help in this respect is very appreciated.

Thanks.

Best regards,

Stefan

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igorpadykov
NXP Employee
NXP Employee

Hi Stefan

I escalated it and received below answer:

---------------------

The legacy FSL OTP driver used by i.mx6/7 is deprecated now.

You need to use the new nvmem driver based, please take a look on my response from here [1].

0001-Add-i.MX8MMini-nvmem-fuse-write-functionality.patch.zip

[1] OCOTP write support on i.mx8m 

---------------------

Best regards
igor

3,690 Views
s_k
Contributor II

Hi Igor,

 

I appreciate this hint, but our problems had to do with the JTAG chain.

Because of the SJC section of the user manual, we expected the same JTAG chain as on the iMX6 (4 components in MOD = 0).

Instead, we found only one component in the chain. We had trouble accessing the internal memory.

Finally, end of last week we figured it out  how to use this component to access the OC_OTP registers.

 

Thank you.

Best regards,

Stefan

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igorpadykov
NXP Employee
NXP Employee

Hi Stefan

---------------------

Ok, so they have a different problem.

The config chain is normal to be different comparing with i.MX6, but the full run control and accessing the internal memory via DAP should be ok. 

I'm afraid is a problem with their custom board. Our NXP team made a schematics review for their JTAG connection?

----------------------

Best regards
igor

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s_k
Contributor II

Hi Igor,

The eFuses programming works now, thanks.

We had to figure it out, how accessing the internal memory map via DAP works on the IMX8MMini.

But there is still one question, because the documentation is poor in this respect:

is the (factory programmed) device unique ID saved to the addresses 0x30350410 and 0x30350420?

It would be helpful for logging.

Thanks.

Best regards,

Stefan

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igorpadykov
NXP Employee
NXP Employee

Hi Stefan

I was prompted on:

---------------

The unique id is 64b long and it stored in the fuses at the following offsets: 0x410 and 0x420. To get the values stored you have to read the bank 0, words 1 and 2.

 

Commands are:

fuse read 0 1

fuse read 0 2

 

You can also get the same values reading the OCOTP_HW_OCOTP_TESTER0 and OCOTP_HW_OCOTP_TESTER1 registers.

Commands are:

md.l 0x30350410 1

md.l 0x30350420 1

---------------

Best regards
igor

3,690 Views
s_k
Contributor II

Hi Igor,

Thank you, this case can now be closed.

Best Regards,

Stefan

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igorpadykov
NXP Employee
NXP Employee

Hi Stefan

you are right, for processors without scu like i.MX8M Mini fuses can

be programmed with jtag.

Best regards
igor
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