We are testing our prototype boards (using the iMX RT1064) to make sure we can support CANFD. We ran into issues with certain combinations of arbitration rate and FD rate. Specifically 500K/5M and 250K/5M. FLEXCAN_FDCalculateImprovedTimingValues failed to work at these combinations. I resorted to manually setting up the timing. At 500K/5M, we get significant errors when testing board to board. 250K/5M is worse. Testing at 1M/5M we have no problems.
I also tested using Canalyzer (sending from NXP, receiving with Canalyzer), 1M/5M works fine, but at 500K/5M and 250K/5M every frame is flagged as an error. It seems to fail early after BRS; Canalyzer reads the header correctly, but DLC is wrong. I've tried various timing settings. I won't list every setting tried, but I have listed one example of timing settings that worked and one that didn't.
Is there a problem with my configuration, or is this a limitation of the peripheral?
Clock is 80MHz in both setups
1M/5M, working:
preDivider 0
rJumpwidth 15
phaseSeg1 18
phaseSeg2 18
propSeg 40
fpreDivider 1
frJumpwidth 2
fphaseSeg1 1
fphaseSeg2 1
fpropSeg 3
500K/5M, not working:
preDivider 1
rJumpwidth 15
phaseSeg1 8
phaseSeg2 8
propSeg 60
fpreDivider 1
frJumpwidth 2
fphaseSeg1 1
fphaseSeg2 1
fpropSeg 3
Thanks in advance for any advice.
I was testing both with CANAlyzer and between our two IMXRT1064 based boards. In both setups, 500K/5M and 250K/5M failed but 1M/5M worked.
At your suggestion, I just tried it in loopback mode, and the sends went through. Do you think my timing is off and the propagation delay is causing problems? If so, can you recommend a timing configuration? I'm connecting the boards with only about 6 inches of wire; each board has a split terminating resister grounded with a capacitor.
Thanks,
Alan
Hi @alan-p
So, in your side, loopback mode, 500K/5M and 250K/5M also send and recive works, right?
The issue just happen when test between two RT1064 or one RT1064+CANAlyzer, right?
When you test 500K/5M, 250K/5M, please test it like this:
1. CANFD souce clock use 30M instead of 8M
#define FLEXCAN_CLOCK_SOURCE_DIVIDER (1U)
2.
#define SET_CAN_QUANTUM 1/* change*/
#define PSEG1 3
#define PSEG2 2
#define PROPSEG 1
#define FPSEG1 1/* change*/
#define FPSEG2 1/* change*/
#define FPROPSEG 1/* change*/
Add the following code in FLEXCAN_FDInit.
fdctrl |= CAN_FDCTRL_TDCEN_MASK;/* change *
activating the TDC bit in the FDCTRL register.
This bit has to be turned ON only when you want to have a baudrate greater than 2.5Mbps.
Your 500K 5M situation, I have tested in the previous time.
Please check my attached code.
I even write a chinese document about it:
https://www.nxpic.org.cn/module/forum/thread-622319-1-1.html
You can see 500K/5M works.
I also test:
My test result:
Case 1: the arbitration baudrate is 1Mbit/s, and data baudrate is 5Mbit/s, ->work
PRESDIV = 2, when arbitration baudrate is 1Mbit/s.
flexcanConfig.baudRate = 1000000U;
flexcanConfig.baudRateFD = 5000000U;/* change*/
Case 2: the arbitration baudrate is 500Kbit/s, and data baudrate is 5Mbit/s, ->work
PRESDIV = 5, when arbitration baudrate is 500Kbit/s,
flexcanConfig.baudRate = 500000U;
flexcanConfig.baudRateFD = 5000000U;/* change*/s
Case 3: the arbitration baudrate is 250Kbit/s, and data baudrate is 5Mbit/s, ->work
PRESDIV = 11, when arbitration baudrate is 250Kbit/s,
flexcanConfig.baudRate = 250000U;
flexcanConfig.baudRateFD = 5000000U;/* change*/
Case 4: the arbitration baudrate is 125Kbit/s, and data baudrate is 5Mbit/s, ->work
PRESDIV = 23, when arbitration baudrate is 125Kbit/s,
flexcanConfig.baudRate = 125000U;
flexcanConfig.baudRateFD = 5000000U;/* change*/
Although it is for RT1060-EVK, your RT1064 is the same.
Wish it helps you!
Best Regards,
Kerry
Hi @alan-p
Do you test your 500K/5M and 250K/5M with the external PC CAN tool analyzer, right?
Do you try to configure it as 500K/5M and 250K/5M., then use the loopback, whether it works, or you connect to another RT chip as another CAN node, whether that method works or not?
Best Regards,
Kerry