The bit positions in Reference manual 0.1 seem to be in the incorrect position can I get clarifications about this ?
Looking at the reference manual { 0.1, 08/2016 }, FTM registers are bit number [ 0:31 ] where the GPT registers are numbered [ 31:0 ]. for example is WPDIS in bit position 29 or bit position 3 ?
已解决! 转到解答。
Do you mean the Reference Manual document for the i.MX7Dual processor? If so, this is just the typo in the manual. The bit numbering order, shown in the FTM chapter, is wrong. The bits should be numbered [31:0], as usual. For the correct bit numbering, please refer to the FlexTimer module chapter in the Vybrid series Reference Manual document (the Vybrid series processors use the same FlexTimer module as i.MX7Dual/Solo), available on the Vybrid Documentation web page:
Have a great day,
Artur
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Do you mean the Reference Manual document for the i.MX7Dual processor? If so, this is just the typo in the manual. The bit numbering order, shown in the FTM chapter, is wrong. The bits should be numbered [31:0], as usual. For the correct bit numbering, please refer to the FlexTimer module chapter in the Vybrid series Reference Manual document (the Vybrid series processors use the same FlexTimer module as i.MX7Dual/Solo), available on the Vybrid Documentation web page:
Have a great day,
Artur
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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