Another imx8mp 4GB LPDDR uboot question

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Another imx8mp 4GB LPDDR uboot question

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jmp
Contributor II

Hello,

We have board based on the imx8mp evk that has 4GB LPDDR4 instead of 6G, and I'm trying to understand the correct settings for PHYS_SDRAM_SIZE and the memory devicetree node.

The memory module (MT53E1G32D2FW) datasheet lists 32Gb/package, 16Gb dual-channel die. Listed are 2 die, 2 channels per die, and 8 banks per channel. Density: 8Gb per channel, 16Gb per die.

I ran the DDR tool and got the timings for the board to boot. Now I need to do the uboot configuration. It seems I have 2 primary options for uboot configuration 3GB/1GB or 2GB/2GB splits.

3GB/1GB split

Board header:

 

#define PHYS_SDRAM_SIZE   0xc0000000 /* 3 GB */
#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */

 

Device tree:

 

		reg = <0x0 0x40000000 0 0xc0000000>,
		      <0x1 0x00000000 0 0x40000000>;

 

or

2GB/2GB split

Board header:

 

#define PHYS_SDRAM_SIZE   0x80000000 /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */

 

Device tree:

 

		reg = <0x0 0x40000000 0 0x80000000>,
		      <0x1 0x00000000 0 0x80000000>;

 

They both seem to boot ok, but I'm not sure which is correct (if any).

In this post, there was this was the suggestion:

 

#define PHYS_SDRAM_SIZE		0xC0000000  /* 3 GB */  //This value is the size that you will need for your first die on your memory. In this case 3GB.

 

Since the density of each die on this DDR is 16Gb (2GB), that would indicate that I should use a 2G/2G split.

However, in this post, the suggestion was:

.xlsx seems as correct. For imx8mp_evk.h suggest to leave "PHYS_SDRAM_SIZE" in default value,

This suggestion would indicate that I should use the 3GB/1GB split.

Here is another post where the person tried both ways, although their issue was not running the DDR tool first.

I've seen both approaches in various board headers in the uboot source tree, which only adds confusion.

So my question is whether PHYS_SDRAM_SIZE should be based on the die density (16Gb) value or set  to the size of the imx8mp's first DDR memory map region (3GB)? In other words, is the 3GB/1GB split or 2GB/2GB split correct?

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joanxie
NXP TechSupport
NXP TechSupport

yes, we suggest customer to use 3G+1G, you also can find the definition for DDR4(4G) in the uboot

https://github.com/varigit/uboot-imx/blob/imx_v2020.04_5.4.70_2.3.2_var01/include/configs/imx8mp_evk...

but I think if you use 2G should be fine, if 3G+1G works for you why do you struggle with this? just use this, it's fine, you can find imx8mp memory map from reference manual

joanxie_0-1714461890148.png

 

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rcossdev
Contributor I

Hello jmp,

Did you manage to generate the lpddr4_timing.c file?

We designed a board based also on the imx8mp using the same RAM (MT53E1G32D2FW)
But since we didn't include the OTG circuitry we're unable to run the ddr tool and we're struggling to do the bring-up of the board.

I'd really appreciate if you could share your timing file.

Thanks!

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jmp
Contributor II

Hi rcossdev,

One of our hardware guys was able to generate the details for the config tool by filling in the device info table in the DDR configuration spreadsheet. He used the one from here. From what I remember, we copied the data from the last tab to the config tool to actually generate the c code.

Requirements changed and we actually moved over to the mx8mq. I had to clear that workspace to make room due to the size of yocto, so I'll have to see if anyone still has a copy. The caveat is that we never got that board to actually pass all of the config tool's DDR validation tests before switching boards.

I know the docs say that OTG is required, but I used the config tool on the board we were working on and the hardware guys later assured me that it did not have OTG. I do remember having to connect both the USB cable and separate usb-serial adapter without any SD cards to get the tools to communicate with the board and load the validation code. I'm not sure why that worked, but it did pass the lower frequency tests for what it's worth.

 

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rcossdev
Contributor I

Thanks for your quick response. 
Well in theory, the ddr tool can communicate with a board that doesn't have OTG as long as the circuit is configured as USB-Device. The issue is we don't have all the USB pins exposed on our board to make it work like that.

That's why I'm searching for the file lpddr4_timing.c obtained for the RAM MT53E1G32D2FW.

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jmp
Contributor II

I haven't found anyone yet, but do you have this tool?

https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-developm...

I'm pretty sure all we did was generate the initial file by filling in the device info on the DDR screen. After you choose the part number when creating a new project, you go to the DDR screen using the menu at the top. It will load a table that you fill in the module info. This will update the tabs on the right with the .ds and the timing.c files. You can see the tabs I'm talking about in the second screenshot on the tool's main page (see below).

CONFIG-TOOLS-DDR-TOOL

 

I believe these are the settings from the datasheet that go in the table.

8
2
2
32
16
10
3
8
32
2000
0.5
200
5
50
20

Without the pins to run the tool, though, you won't be able to tune the settings or run the validation tests. From experience, you may end up with some very tricky bugs down the road without doing those steps.

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joanxie
NXP TechSupport
NXP TechSupport

yes, we suggest customer to use 3G+1G, you also can find the definition for DDR4(4G) in the uboot

https://github.com/varigit/uboot-imx/blob/imx_v2020.04_5.4.70_2.3.2_var01/include/configs/imx8mp_evk...

but I think if you use 2G should be fine, if 3G+1G works for you why do you struggle with this? just use this, it's fine, you can find imx8mp memory map from reference manual

joanxie_0-1714461890148.png

 

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jmp
Contributor II

Perfect, thank you for the clarification.

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