Hi,
Please can I get the detailed hardware manual about different blocks inside the processor IMX6SLEC regarding the power management,because inside the power block diagram of the processor why internal LDO regulators are used?
What is the difference between LDO enabled and LDO bypassed configuration I mean two run modes of the processor IMX6SLEC....
We do not provide details of internal parts implementation, sorry.
Generally one can look atFigure 1. (i.MX 6Solo power rails)
of app note AN4715 (i.MX 6Solo Power Consumption Measurement),
where LDO modules are shown. LDO bypass mode may be considered as a jumper
(providing short circuit) between LGO input and output.
In LDO enabled mode, the i.MX6 input voltage is only applied to the input of the LDO,
which is designed to handle it. In LDO bypass mode, say, the VDD_ARM_IN and VDD_SOC_IN
voltages bypass the LDO and feed the internal logic. This is why they have a lower minimal
value in the datasheet than the LDO inputs.
App note link :
http://cache.freescale.com/files/32bit/doc/app_note/AN4715.pdf