I am working on a custom board based on T1042. I have use on board DDR3L discrete RAM in my design. I have successfully flashed U-BOOT, RCW, DTB, kernel and file-system in the NOR flash. When the board boots up, it is crashing at a point where file-system is being loaded to RAMDISK.
I have generated RAM's timing parameters through codewarrior DDRV Tool and used those parameters in my uboot.
When I check my RAM through mtest command in UBOOT, it always fails. But when I write some data on the RAM through mw (memory write) command and read it back by md (memory read) command, I found the same data that I have written on the memory.
I have attached kernal logs for the case when it crashes. Kindly help me to get rid of this error.
Hello Ather Shehzad,
Please use QCVS DDRv tool to do validated and optimization.
Please execute "Centering the clock", "Read/Write ODT and driver" validation and Operational DDR test.
Please refer to DDR Controller Configuration on LS2085/LS2080 Bringing up and QCVS DDRv user manual https://www.nxp.com/docs/en/user-guide/QCVS_DDR_User_Guide.pdf .
Thanks,
Yiping
I had already used DDR timing values that are generated by QCVS DDRv tool.
When I test my memory through mtest command, the memory test always fails
and gets exactly opposite of what is expected. For example it gets
0xFFFFFFFF while expected 0x00000000. However when I test my memory through
mw command and read through md command in UBOOT, I always read what I
had written.
Regards
Ather
Hello Ather,
Can you pass "Operational DDR test" in your DDRv project?
Thanks,
Yiping
Helo Yiping,
Let's continue to discuss you problem in https://community.nxp.com/t5/CodeWarrior-for-QorIQ/DDR-Validation-Tool-Tests-Description/td-p/114770....
OK.
Please tell the description of the tests if you know. And what does these results show ?
Please refer to the description in https://community.nxp.com/t5/CodeWarrior-for-QorIQ/DDR-Validation-Tool-Tests-Description/td-p/114770...